thumb32: Implement LDRB variants
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3 changed files with 84 additions and 5 deletions
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@ -153,11 +153,11 @@ INST(thumb32_PLI_lit, "PLI (lit)", "11111001U00111111111ii
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INST(thumb32_PLI_reg, "PLI (reg)", "111110010001nnnn1111000000iimmmm")
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INST(thumb32_PLI_imm8, "PLI (imm8)", "111110010001nnnn11111100iiiiiiii")
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INST(thumb32_PLI_imm12, "PLI (imm12)", "111110011001nnnn1111iiiiiiiiiiii")
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//INST(thumb32_LDRB_lit, "LDRB (lit)", "11111000-0011111----------------")
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//INST(thumb32_LDRB_reg, "LDRB (reg)", "111110000001--------000000------")
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//INST(thumb32_LDRBT, "LDRBT", "111110000001--------1110--------")
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//INST(thumb32_LDRB_imm8, "LDRB (imm8)", "111110000001--------1-----------")
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//INST(thumb32_LDRB_imm12, "LDRB (imm12)", "111110001001--------------------")
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INST(thumb32_LDRB_lit, "LDRB (lit)", "11111000U0011111ttttiiiiiiiiiiii")
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INST(thumb32_LDRB_reg, "LDRB (reg)", "111110000001nnnntttt000000iimmmm")
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INST(thumb32_LDRBT, "LDRBT", "111110000001nnnntttt1110iiiiiiii")
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INST(thumb32_LDRB_imm8, "LDRB (imm8)", "111110000001nnnntttt1PUWiiiiiiii")
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INST(thumb32_LDRB_imm12, "LDRB (imm12)", "111110001001nnnnttttiiiiiiiiiiii")
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//INST(thumb32_LDRSB_lit, "LDRSB (lit)", "11111001-0011111----------------")
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//INST(thumb32_LDRSB_reg, "LDRSB (reg)", "111110010001--------000000------")
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//INST(thumb32_LDRSBT, "LDRSBT", "111110010001--------1110--------")
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@ -78,4 +78,78 @@ bool ThumbTranslatorVisitor::thumb32_PLI_reg([[maybe_unused]] Reg n,
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return PLIHandler(*this);
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}
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bool ThumbTranslatorVisitor::thumb32_LDRB_lit(bool U, Reg t, Imm<12> imm12) {
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const u32 imm32 = imm12.ZeroExtend();
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const u32 base = ir.AlignPC(4);
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const u32 address = U ? (base + imm32) : (base - imm32);
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const auto data = ir.ZeroExtendByteToWord(ir.ReadMemory8(ir.Imm32(address)));
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ir.SetRegister(t, data);
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_LDRB_imm8(Reg n, Reg t, bool P, bool U, bool W, Imm<8> imm8) {
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if (t == Reg::PC && W) {
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return UnpredictableInstruction();
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}
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if (W && n == t) {
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return UnpredictableInstruction();
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}
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if (!P && !W) {
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return UndefinedInstruction();
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}
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const u32 imm32 = imm8.ZeroExtend();
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const IR::U32 reg_n = ir.GetRegister(n);
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const IR::U32 offset_address = U ? ir.Add(reg_n, ir.Imm32(imm32))
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: ir.Sub(reg_n, ir.Imm32(imm32));
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const IR::U32 address = P ? offset_address : reg_n;
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const IR::U32 data = ir.ZeroExtendByteToWord(ir.ReadMemory8(address));
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ir.SetRegister(t, data);
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if (W) {
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ir.SetRegister(n, offset_address);
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}
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_LDRB_imm12(Reg n, Reg t, Imm<12> imm12) {
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const auto imm32 = imm12.ZeroExtend();
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const auto reg_n = ir.GetRegister(n);
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const auto address = ir.Add(reg_n, ir.Imm32(imm32));
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const auto data = ir.ZeroExtendByteToWord(ir.ReadMemory8(address));
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ir.SetRegister(t, data);
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_LDRB_reg(Reg n, Reg t, Imm<2> imm2, Reg m) {
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if (m == Reg::PC) {
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return UnpredictableInstruction();
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}
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const auto reg_n = ir.GetRegister(n);
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const auto reg_m = ir.GetRegister(m);
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const auto offset = ir.LogicalShiftLeft(reg_m, ir.Imm8(imm2.ZeroExtend<u8>()));
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const auto address = ir.Add(reg_n, offset);
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const auto data = ir.ZeroExtendByteToWord(ir.ReadMemory8(address));
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ir.SetRegister(t, data);
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_LDRBT(Reg n, Reg t, Imm<8> imm8) {
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// TODO: Add an unpredictable instruction path if this
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// is executed in hypervisor mode if we ever support
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// privileged execution modes.
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if (t == Reg::PC) {
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return UnpredictableInstruction();
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}
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// Treat it as a normal LDRB, given we don't support
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// execution levels other than EL0 currently.
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return thumb32_LDRB_imm8(n, t, true, true, false, imm8);
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}
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} // namespace Dynarmic::A32
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@ -214,6 +214,11 @@ struct ThumbTranslatorVisitor final {
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bool thumb32_PLI_imm8(Reg n, Imm<8> imm8);
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bool thumb32_PLI_imm12(Reg n, Imm<12> imm12);
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bool thumb32_PLI_reg(Reg n, Imm<2> imm2, Reg m);
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bool thumb32_LDRB_lit(bool U, Reg t, Imm<12> imm12);
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bool thumb32_LDRB_reg(Reg n, Reg t, Imm<2> imm2, Reg m);
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bool thumb32_LDRB_imm8(Reg n, Reg t, bool P, bool U, bool W, Imm<8> imm8);
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bool thumb32_LDRB_imm12(Reg n, Reg t, Imm<12> imm12);
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bool thumb32_LDRBT(Reg n, Reg t, Imm<8> imm8);
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// thumb32 data processing (register) instructions
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bool thumb32_ASR_reg(Reg m, Reg d, Reg s);
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