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thumb32: Add supporting decoder entry for PLD (literal)

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LDRH (literal)'s pseduocode indicates that cases where Rt specifies the
PC, that the instruction should be execured as if it were a PLD
instruction.

Curiously, however, within the ARM reference manual, the encodings in the case
that happens doesn't match up.

The bit pattern for LDRH (literal) has bit 21 set to 1, but the encoding
of PLD (literal) has bit 21 set to zero for it's only thumb encoding.
This commit is contained in:
Lioncash 2021-03-09 18:11:53 -05:00
parent 921998f6e9
commit fb30922cd1
1 changed files with 1 additions and 0 deletions
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src/frontend/A32/decoder/thumb32.inc
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@ -142,6 +142,7 @@ INST(thumb32_STR_reg, "STR (reg)", "111110000100nnnntttt00
// Load Byte and Memory Hints // Load Byte and Memory Hints
INST(thumb32_PLD_lit, "PLD (lit)", "11111000U00111111111iiiiiiiiiiii") INST(thumb32_PLD_lit, "PLD (lit)", "11111000U00111111111iiiiiiiiiiii")
INST(thumb32_PLD_lit, "PLD (lit)", "11111000U01111111111iiiiiiiiiiii")
INST(thumb32_PLD_reg, "PLD (reg)", "1111100000W1nnnn1111000000iimmmm") INST(thumb32_PLD_reg, "PLD (reg)", "1111100000W1nnnn1111000000iimmmm")
INST(thumb32_PLD_imm8, "PLD (imm8)", "1111100000W1nnnn11111100iiiiiiii") INST(thumb32_PLD_imm8, "PLD (imm8)", "1111100000W1nnnn11111100iiiiiiii")
INST(thumb32_PLD_imm12, "PLD (imm12)", "1111100010W1nnnn1111iiiiiiiiiiii") INST(thumb32_PLD_imm12, "PLD (imm12)", "1111100010W1nnnn1111iiiiiiiiiiii")