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thumb32: Implement QADD16/UQADD16

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This commit is contained in:
Lioncash 2021-02-01 16:52:18 -05:00
parent 6f593da41b
commit f52b8f924c
4 changed files with 35 additions and 2 deletions
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4
src/frontend/A32/decoder/thumb32.h
View file

@ -241,7 +241,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
INST(&V::thumb32_SSUB16, "SSUB16", "111110101101nnnn1111dddd0000mmmm"), INST(&V::thumb32_SSUB16, "SSUB16", "111110101101nnnn1111dddd0000mmmm"),
INST(&V::thumb32_SADD8, "SADD8", "111110101000nnnn1111dddd0000mmmm"), INST(&V::thumb32_SADD8, "SADD8", "111110101000nnnn1111dddd0000mmmm"),
INST(&V::thumb32_SSUB8, "SSUB8", "111110101100nnnn1111dddd0000mmmm"), INST(&V::thumb32_SSUB8, "SSUB8", "111110101100nnnn1111dddd0000mmmm"),
//INST(&V::thumb32_QADD16, "QADD16", "111110101001----1111----0001----"), INST(&V::thumb32_QADD16, "QADD16", "111110101001nnnn1111dddd0001mmmm"),
//INST(&V::thumb32_QASX, "QASX", "111110101010----1111----0001----"), //INST(&V::thumb32_QASX, "QASX", "111110101010----1111----0001----"),
//INST(&V::thumb32_QSAX, "QSAX", "111110101110----1111----0001----"), //INST(&V::thumb32_QSAX, "QSAX", "111110101110----1111----0001----"),
//INST(&V::thumb32_QSUB16, "QSUB16", "111110101101----1111----0001----"), //INST(&V::thumb32_QSUB16, "QSUB16", "111110101101----1111----0001----"),
@ -261,7 +261,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
INST(&V::thumb32_USUB16, "USUB16", "111110101101nnnn1111dddd0100mmmm"), INST(&V::thumb32_USUB16, "USUB16", "111110101101nnnn1111dddd0100mmmm"),
INST(&V::thumb32_UADD8, "UADD8", "111110101000nnnn1111dddd0100mmmm"), INST(&V::thumb32_UADD8, "UADD8", "111110101000nnnn1111dddd0100mmmm"),
INST(&V::thumb32_USUB8, "USUB8", "111110101100nnnn1111dddd0100mmmm"), INST(&V::thumb32_USUB8, "USUB8", "111110101100nnnn1111dddd0100mmmm"),
//INST(&V::thumb32_UQADD16, "UQADD16", "111110101001----1111----0101----"), INST(&V::thumb32_UQADD16, "UQADD16", "111110101001nnnn1111dddd0101mmmm"),
//INST(&V::thumb32_UQASX, "UQASX", "111110101010----1111----0101----"), //INST(&V::thumb32_UQASX, "UQASX", "111110101010----1111----0101----"),
//INST(&V::thumb32_UQSAX, "UQSAX", "111110101110----1111----0101----"), //INST(&V::thumb32_UQSAX, "UQSAX", "111110101110----1111----0101----"),
//INST(&V::thumb32_UQSUB16, "UQSUB16", "111110101101----1111----0101----"), //INST(&V::thumb32_UQSUB16, "UQSUB16", "111110101101----1111----0101----"),

26
src/frontend/A32/translate/impl/thumb32_parallel.cpp
View file

@ -175,4 +175,30 @@ bool ThumbTranslatorVisitor::thumb32_USUB16(Reg n, Reg d, Reg m) {
return true; return true;
} }
bool ThumbTranslatorVisitor::thumb32_QADD16(Reg n, Reg d, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto reg_m = ir.GetRegister(m);
const auto reg_n = ir.GetRegister(n);
const auto result = ir.PackedSaturatedAddS16(reg_n, reg_m);
ir.SetRegister(d, result);
return true;
}
bool ThumbTranslatorVisitor::thumb32_UQADD16(Reg n, Reg d, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto reg_m = ir.GetRegister(m);
const auto reg_n = ir.GetRegister(n);
const auto result = ir.PackedSaturatedAddU16(reg_n, reg_m);
ir.SetRegister(d, result);
return true;
}
} // namespace Dynarmic::A32 } // namespace Dynarmic::A32

3
src/frontend/A32/translate/impl/translate_thumb.h
View file

@ -141,6 +141,9 @@ struct ThumbTranslatorVisitor final {
bool thumb32_USAX(Reg n, Reg d, Reg m); bool thumb32_USAX(Reg n, Reg d, Reg m);
bool thumb32_USUB8(Reg n, Reg d, Reg m); bool thumb32_USUB8(Reg n, Reg d, Reg m);
bool thumb32_USUB16(Reg n, Reg d, Reg m); bool thumb32_USUB16(Reg n, Reg d, Reg m);
bool thumb32_QADD16(Reg n, Reg d, Reg m);
bool thumb32_UQADD16(Reg n, Reg d, Reg m);
}; };
} // namespace Dynarmic::A32 } // namespace Dynarmic::A32

4
tests/A32/fuzz_thumb.cpp
View file

@ -378,6 +378,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
}), }),
ThumbInstGen("111110101000nnnn1111dddd1000mmmm", // QADD ThumbInstGen("111110101000nnnn1111dddd1000mmmm", // QADD
three_reg_not_r15), three_reg_not_r15),
ThumbInstGen("111110101001nnnn1111dddd0001mmmm", // QADD16
three_reg_not_r15),
ThumbInstGen("111110101000nnnn1111dddd1001mmmm", // QDADD ThumbInstGen("111110101000nnnn1111dddd1001mmmm", // QDADD
three_reg_not_r15), three_reg_not_r15),
ThumbInstGen("111110101000nnnn1111dddd1011mmmm", // QDSUB ThumbInstGen("111110101000nnnn1111dddd1011mmmm", // QDSUB
@ -432,6 +434,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
three_reg_not_r15), three_reg_not_r15),
ThumbInstGen("111110101010nnnn1111dddd0100mmmm", // UASX ThumbInstGen("111110101010nnnn1111dddd0100mmmm", // UASX
three_reg_not_r15), three_reg_not_r15),
ThumbInstGen("111110101001nnnn1111dddd0101mmmm", // UQADD16
three_reg_not_r15),
ThumbInstGen("111110101110nnnn1111dddd0100mmmm", // USAX ThumbInstGen("111110101110nnnn1111dddd0100mmmm", // USAX
three_reg_not_r15), three_reg_not_r15),
ThumbInstGen("111110101100nnnn1111dddd0100mmmm", // USUB8 ThumbInstGen("111110101100nnnn1111dddd0100mmmm", // USUB8