From f374d6acb0e944bbe8911bb4a9582faf607d0c0b Mon Sep 17 00:00:00 2001
From: Macdu <Macdu@users.noreply.github.com>
Date: Mon, 17 Oct 2022 17:34:06 +0200
Subject: [PATCH] FPVectorFromHalf32 implementation

---
 .../arm64/emit_arm64_vector_floating_point.cpp  | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp b/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
index 94ed75ae..22964daf 100644
--- a/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
+++ b/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
@@ -290,10 +290,19 @@ void EmitIR<IR::Opcode::FPVectorEqual64>(oaknut::CodeGenerator& code, EmitContex
 
 template<>
 void EmitIR<IR::Opcode::FPVectorFromHalf32>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
-    (void)code;
-    (void)ctx;
-    (void)inst;
-    ASSERT_FALSE("Unimplemented");
+    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
+    const auto rounding_mode = static_cast<FP::RoundingMode>(args[1].GetImmediateU8());
+    ASSERT(rounding_mode == FP::RoundingMode::ToNearest_TieEven);
+    const bool fpcr_controlled = args[2].GetImmediateU1();
+
+    auto Qresult = ctx.reg_alloc.WriteQ(inst);
+    auto Doperand = ctx.reg_alloc.ReadD(args[0]);
+    RegAlloc::Realize(Qresult, Doperand);
+    ctx.fpsr.Load();
+
+    MaybeStandardFPSCRValue(code, ctx, fpcr_controlled, [&] {
+        code.FCVTL(Qresult->S4(), Doperand->H4());
+    });
 }
 
 template<>