diff --git a/tests/skyeye_interpreter/dyncom/arm_dyncom_interpreter.cpp b/tests/skyeye_interpreter/dyncom/arm_dyncom_interpreter.cpp
index d5e4f7cf..fa32b9a6 100644
--- a/tests/skyeye_interpreter/dyncom/arm_dyncom_interpreter.cpp
+++ b/tests/skyeye_interpreter/dyncom/arm_dyncom_interpreter.cpp
@@ -5436,10 +5436,11 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
                 operand2 = (BIT(RS, 15)) ? (BITS(RS, 0, 15) | 0xffff0000) : BITS(RS, 0, 15);
             else
                 operand2 = (BIT(RS, 31)) ? (BITS(RS, 16, 31) | 0xffff0000) : BITS(RS, 16, 31);
-            RD = operand1 * operand2 + RN;
-
-            if (AddOverflow(operand1 * operand2, RN, RD))
+            u32 product = operand1 * operand2;
+            u32 result = product + RN;
+            if (AddOverflow(product, RN, result))
                 cpu->Cpsr |= (1 << 27);
+            RD = result;
         }
         cpu->Reg[15] += cpu->GetInstructionSize();
         INC_PC(sizeof(smla_inst));
@@ -5472,28 +5473,27 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
 
             // SMUAD and SMLAD
             if (BIT(op2, 1) == 0) {
-                RD = (product1 + product2);
-
-                if (inst_cream->Ra != 15) {
-                    RD += cpu->Reg[inst_cream->Ra];
-
-                    if (ARMul_AddOverflowQ(product1 + product2, cpu->Reg[inst_cream->Ra]))
-                        cpu->Cpsr |= (1 << 27);
-                }
-
+                u32 result = product1 + product2;
                 if (ARMul_AddOverflowQ(product1, product2))
                     cpu->Cpsr |= (1 << 27);
+
+                if (inst_cream->Ra != 15) {
+                    if (ARMul_AddOverflowQ(result, cpu->Reg[inst_cream->Ra]))
+                        cpu->Cpsr |= (1 << 27);
+                    result += cpu->Reg[inst_cream->Ra];
+                }
+                RD = result;
             }
             // SMUSD and SMLSD
             else {
-                RD = (product1 - product2);
+                u32 result = product1 - product2;
 
                 if (inst_cream->Ra != 15) {
-                    RD += cpu->Reg[inst_cream->Ra];
-
-                    if (ARMul_AddOverflowQ(product1 - product2, cpu->Reg[inst_cream->Ra]))
+                    if (ARMul_AddOverflowQ(result, cpu->Reg[inst_cream->Ra]))
                         cpu->Cpsr |= (1 << 27);
+                    result += cpu->Reg[inst_cream->Ra];
                 }
+                RD = result;
             }
         }