Implement thumb1_MOV_reg
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8920ce79b9
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f0f14fa5e8
3 changed files with 20 additions and 2 deletions
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@ -56,7 +56,7 @@ private:
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};
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};
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template <typename V>
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template <typename V>
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static const std::array<Thumb1Matcher<V>, 29> g_thumb1_instruction_table {{
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static const std::array<Thumb1Matcher<V>, 30> g_thumb1_instruction_table {{
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#define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring)
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#define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring)
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@ -94,7 +94,7 @@ static const std::array<Thumb1Matcher<V>, 29> g_thumb1_instruction_table {{
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// Special data instructions
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// Special data instructions
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{ INST(&V::thumb1_ADD_reg_t2, "ADD (reg, T2)", "01000100Dmmmmddd") }, // v4T, Low regs: v6T2
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{ INST(&V::thumb1_ADD_reg_t2, "ADD (reg, T2)", "01000100Dmmmmddd") }, // v4T, Low regs: v6T2
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{ INST(&V::thumb1_CMP_reg_t2, "CMP (reg, T2)", "01000101Nmmmmnnn") }, // v4T
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{ INST(&V::thumb1_CMP_reg_t2, "CMP (reg, T2)", "01000101Nmmmmnnn") }, // v4T
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//{ INST(&V::thumb1_MOV_high, "MOV (high)", "01000110dmmmmddd") }, // v4T, Low regs: v6
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{ INST(&V::thumb1_MOV_reg, "MOV (reg)", "01000110Dmmmmddd") }, // v4T, Low regs: v6
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// Store/Load single data item instructions
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// Store/Load single data item instructions
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//{ INST(&V::thumb1_LDR_lit, "LDR (literal)", "01001dddvvvvvvvv") },
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//{ INST(&V::thumb1_LDR_lit, "LDR (literal)", "01001dddvvvvvvvv") },
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@ -217,6 +217,11 @@ public:
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return Common::StringFromFormat("cmp %s, %s", RegStr(n), RegStr(m));
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return Common::StringFromFormat("cmp %s, %s", RegStr(n), RegStr(m));
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}
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}
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std::string thumb1_MOV_reg(bool d_hi, Reg m, Reg d_lo) {
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Reg d = d_hi ? (d_lo + 8) : d_lo;
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return Common::StringFromFormat("mov %s, %s", RegStr(d), RegStr(m));
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}
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std::string thumb1_UDF() {
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std::string thumb1_UDF() {
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return Common::StringFromFormat("udf");
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return Common::StringFromFormat("udf");
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}
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}
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@ -351,6 +351,19 @@ struct TranslatorVisitor final {
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ir.SetVFlag(result.overflow);
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ir.SetVFlag(result.overflow);
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return true;
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return true;
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}
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}
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bool thumb1_MOV_reg(bool d_hi, Reg m, Reg d_lo) {
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Reg d = d_hi ? (d_lo + 8) : d_lo;
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// MOV <Rd>, <Rm>
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auto result = ir.GetRegister(m);
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if (d == Reg::PC) {
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ir.ALUWritePC(result);
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ir.SetTerm(IR::Term::ReturnToDispatch{});
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return false;
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} else {
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ir.SetRegister(d, result);
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return true;
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}
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}
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bool thumb1_UDF() {
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bool thumb1_UDF() {
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return TranslateThisInstruction();
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return TranslateThisInstruction();
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