A64: Implement FMOV (general)
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dd88cee15a
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eb5591859c
3 changed files with 61 additions and 2 deletions
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@ -881,7 +881,7 @@ INST(SCVTF_float_int, "SCVTF (scalar, integer)", "z0011
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INST(UCVTF_float_int, "UCVTF (scalar, integer)", "z0011110yy100011000000nnnnnddddd")
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INST(UCVTF_float_int, "UCVTF (scalar, integer)", "z0011110yy100011000000nnnnnddddd")
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//INST(FCVTAS_float, "FCVTAS (scalar)", "z0011110yy100100000000nnnnnddddd")
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//INST(FCVTAS_float, "FCVTAS (scalar)", "z0011110yy100100000000nnnnnddddd")
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//INST(FCVTAU_float, "FCVTAU (scalar)", "z0011110yy100101000000nnnnnddddd")
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//INST(FCVTAU_float, "FCVTAU (scalar)", "z0011110yy100101000000nnnnnddddd")
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//INST(FMOV_float_gen, "FMOV (general)", "z0011110yy10-11-000000nnnnnddddd")
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INST(FMOV_float_gen, "FMOV (general)", "z0011110yy10r11o000000nnnnnddddd")
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//INST(FCVTPS_float, "FCVTPS (scalar)", "z0011110yy101000000000nnnnnddddd")
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//INST(FCVTPS_float, "FCVTPS (scalar)", "z0011110yy101000000000nnnnnddddd")
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//INST(FCVTPU_float, "FCVTPU (scalar)", "z0011110yy101001000000nnnnnddddd")
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//INST(FCVTPU_float, "FCVTPU (scalar)", "z0011110yy101001000000nnnnnddddd")
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//INST(FCVTMS_float, "FCVTMS (scalar)", "z0011110yy110000000000nnnnnddddd")
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//INST(FCVTMS_float, "FCVTMS (scalar)", "z0011110yy110000000000nnnnnddddd")
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@ -76,6 +76,65 @@ bool TranslatorVisitor::UCVTF_float_int(bool sf, Imm<2> type, Reg Rn, Vec Vd) {
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return true;
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return true;
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}
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}
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bool TranslatorVisitor::FMOV_float_gen(bool sf, Imm<2> type, Imm<1> rmode_0, Imm<1> opc_0, size_t n, size_t d) {
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// NOTE:
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// opcode<2:1> == 0b11
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// rmode<1> == 0b0
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const size_t intsize = sf ? 64 : 32;
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size_t fltsize;
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switch (type.ZeroExtend()) {
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case 0b00:
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fltsize = 32;
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break;
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case 0b01:
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fltsize = 64;
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break;
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case 0b10:
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if (rmode_0 != 1) {
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return UnallocatedEncoding();
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}
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fltsize = 128;
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break;
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default:
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case 0b11:
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fltsize = 16;
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return UnallocatedEncoding();
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}
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bool integer_to_float;
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size_t part;
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switch (rmode_0.ZeroExtend()) {
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case 0b0:
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if (fltsize != 16 && fltsize != intsize) {
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return UnallocatedEncoding();
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}
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integer_to_float = opc_0 == 0b1;
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part = 0;
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break;
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default:
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case 0b1:
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if (intsize != 64 || fltsize != 128) {
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return UnallocatedEncoding();
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}
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integer_to_float = opc_0 == 0b1;
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part = 1;
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fltsize = 64;
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break;
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}
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if (integer_to_float) {
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IR::U32U64 intval = X(intsize, static_cast<Reg>(n));
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Vpart(fltsize, static_cast<Vec>(d), part, intval);
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} else {
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IR::UAny fltval = Vpart(fltsize, static_cast<Vec>(n), part);
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IR::U32U64 intval = ZeroExtend(fltval, intsize);
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X(intsize, static_cast<Reg>(d), intval);
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}
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return true;
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}
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bool TranslatorVisitor::FCVTZS_float_int(bool sf, Imm<2> type, Vec Vn, Reg Rd) {
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bool TranslatorVisitor::FCVTZS_float_int(bool sf, Imm<2> type, Vec Vn, Reg Rd) {
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const size_t intsize = sf ? 64 : 32;
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const size_t intsize = sf ? 64 : 32;
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const auto fltsize = GetDataSize(type);
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const auto fltsize = GetDataSize(type);
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@ -938,7 +938,7 @@ struct TranslatorVisitor final {
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bool UCVTF_float_int(bool sf, Imm<2> type, Reg Rn, Vec Vd);
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bool UCVTF_float_int(bool sf, Imm<2> type, Reg Rn, Vec Vd);
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bool FCVTAS_float(bool sf, Imm<2> type, Vec Vn, Reg Rd);
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bool FCVTAS_float(bool sf, Imm<2> type, Vec Vn, Reg Rd);
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bool FCVTAU_float(bool sf, Imm<2> type, Vec Vn, Reg Rd);
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bool FCVTAU_float(bool sf, Imm<2> type, Vec Vn, Reg Rd);
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bool FMOV_float_gen(bool sf, Imm<2> type, Vec Vn, Vec Vd);
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bool FMOV_float_gen(bool sf, Imm<2> type, Imm<1> rmode_0, Imm<1> opc_0, size_t n, size_t d);
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bool FCVTPS_float(bool sf, Imm<2> type, Vec Vn, Reg Rd);
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bool FCVTPS_float(bool sf, Imm<2> type, Vec Vn, Reg Rd);
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bool FCVTPU_float(bool sf, Imm<2> type, Vec Vn, Reg Rd);
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bool FCVTPU_float(bool sf, Imm<2> type, Vec Vn, Reg Rd);
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bool FCVTMS_float(bool sf, Imm<2> type, Vec Vn, Reg Rd);
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bool FCVTMS_float(bool sf, Imm<2> type, Vec Vn, Reg Rd);
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