common/fp/op/FPRecipExponent: Add half-precision floating point specialization
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1 changed files with 5 additions and 16 deletions
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@ -17,28 +17,16 @@
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namespace Dynarmic::FP {
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namespace {
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// We don't care about unreachable code warnings here
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// TODO: Remove this warning disabling of warnings when
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// half-float support is added.
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#ifdef _MSC_VER
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#pragma warning(disable:4702)
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#endif
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template <typename FPT>
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FPT DetermineExponentValue(size_t value) {
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if constexpr (sizeof(FPT) == sizeof(u32)) {
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return static_cast<FPT>(Common::Bits<23, 30>(value));
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}
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if constexpr (sizeof(FPT) == sizeof(u64)) {
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} else if constexpr (sizeof(FPT) == sizeof(u64)) {
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return static_cast<FPT>(Common::Bits<52, 62>(value));
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} else {
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return static_cast<FPT>(Common::Bits<10, 14>(value));
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}
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// Half-float
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return static_cast<FPT>(Common::Bits<10, 14>(value));
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}
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#ifdef _MSC_VER
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#pragma warning(default:4702)
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#endif
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} // Anonymous namespace
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template <typename FPT>
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@ -50,7 +38,7 @@ FPT FPRecipExponent(FPT op, FPCR fpcr, FPSR& fpsr) {
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return FPProcessNaN(type, op, fpcr, fpsr);
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}
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const FPT sign_bits = FPInfo<FPT>::Zero(sign);
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const FPT sign_bits = FPT(FPInfo<FPT>::Zero(sign));
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const FPT exponent = DetermineExponentValue<FPT>(op);
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// Zero and denormals
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@ -64,6 +52,7 @@ FPT FPRecipExponent(FPT op, FPCR fpcr, FPSR& fpsr) {
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return FPT(sign_bits | negated_exponent);
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}
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template u16 FPRecipExponent<u16>(u16 op, FPCR fpcr, FPSR& fpsr);
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template u32 FPRecipExponent<u32>(u32 op, FPCR fpcr, FPSR& fpsr);
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template u64 FPRecipExponent<u64>(u64 op, FPCR fpcr, FPSR& fpsr);
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