From ee99fa69e9c14e18488a7d84ece1361f258c8c0b Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 6 Mar 2021 09:13:03 -0500 Subject: [PATCH 1/5] thumb32: Add load source files Places all the skeleton files in place. --- src/frontend/A32/translate/impl/thumb32_load_byte.cpp | 11 +++++++++++ .../A32/translate/impl/thumb32_load_halfword.cpp | 11 +++++++++++ src/frontend/A32/translate/impl/thumb32_load_word.cpp | 11 +++++++++++ 3 files changed, 33 insertions(+) create mode 100644 src/frontend/A32/translate/impl/thumb32_load_byte.cpp create mode 100644 src/frontend/A32/translate/impl/thumb32_load_halfword.cpp create mode 100644 src/frontend/A32/translate/impl/thumb32_load_word.cpp diff --git a/src/frontend/A32/translate/impl/thumb32_load_byte.cpp b/src/frontend/A32/translate/impl/thumb32_load_byte.cpp new file mode 100644 index 00000000..5f4e4104 --- /dev/null +++ b/src/frontend/A32/translate/impl/thumb32_load_byte.cpp @@ -0,0 +1,11 @@ +/* This file is part of the dynarmic project. + * Copyright (c) 2021 MerryMage + * SPDX-License-Identifier: 0BSD + */ + +#include "frontend/A32/translate/impl/translate_thumb.h" + +namespace Dynarmic::A32 { + + +} // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/thumb32_load_halfword.cpp b/src/frontend/A32/translate/impl/thumb32_load_halfword.cpp new file mode 100644 index 00000000..5f4e4104 --- /dev/null +++ b/src/frontend/A32/translate/impl/thumb32_load_halfword.cpp @@ -0,0 +1,11 @@ +/* This file is part of the dynarmic project. + * Copyright (c) 2021 MerryMage + * SPDX-License-Identifier: 0BSD + */ + +#include "frontend/A32/translate/impl/translate_thumb.h" + +namespace Dynarmic::A32 { + + +} // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/thumb32_load_word.cpp b/src/frontend/A32/translate/impl/thumb32_load_word.cpp new file mode 100644 index 00000000..5f4e4104 --- /dev/null +++ b/src/frontend/A32/translate/impl/thumb32_load_word.cpp @@ -0,0 +1,11 @@ +/* This file is part of the dynarmic project. + * Copyright (c) 2021 MerryMage + * SPDX-License-Identifier: 0BSD + */ + +#include "frontend/A32/translate/impl/translate_thumb.h" + +namespace Dynarmic::A32 { + + +} // namespace Dynarmic::A32 From b2802aaf178a6c8bf1ee1b9a93b15ca4c0f9382d Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 6 Mar 2021 09:30:46 -0500 Subject: [PATCH 2/5] thumb32: Implement PLD variants --- src/CMakeLists.txt | 3 ++ src/frontend/A32/decoder/thumb32.inc | 8 ++-- .../A32/translate/impl/thumb32_load_byte.cpp | 37 +++++++++++++++++++ .../A32/translate/impl/translate_thumb.h | 6 +++ 4 files changed, 50 insertions(+), 4 deletions(-) diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 1d1dfc74..6f6bdf45 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -160,6 +160,9 @@ if ("A32" IN_LIST DYNARMIC_FRONTENDS) frontend/A32/translate/impl/thumb32_data_processing_register.cpp frontend/A32/translate/impl/thumb32_data_processing_modified_immediate.cpp frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp + frontend/A32/translate/impl/thumb32_load_byte.cpp + frontend/A32/translate/impl/thumb32_load_halfword.cpp + frontend/A32/translate/impl/thumb32_load_word.cpp frontend/A32/translate/impl/thumb32_long_multiply.cpp frontend/A32/translate/impl/thumb32_misc.cpp frontend/A32/translate/impl/thumb32_multiply.cpp diff --git a/src/frontend/A32/decoder/thumb32.inc b/src/frontend/A32/decoder/thumb32.inc index aee79da8..a5660a52 100644 --- a/src/frontend/A32/decoder/thumb32.inc +++ b/src/frontend/A32/decoder/thumb32.inc @@ -145,10 +145,10 @@ INST(thumb32_STRH, "STRH (reg)", "111110000010nnnntttt00 INST(thumb32_STR_reg, "STR (reg)", "111110000100nnnntttt000000iimmmm") // Load Byte and Memory Hints -//INST(thumb32_PLD_lit, "PLD (lit)", "11111000-00111111111------------") -//INST(thumb32_PLD_reg, "PLD (reg)", "111110000001----1111000000------") -//INST(thumb32_PLD_imm8, "PLD (imm8)", "1111100000-1----11111100--------") -//INST(thumb32_PLD_imm12, "PLD (imm12)", "111110001001----1111------------") +INST(thumb32_PLD_lit, "PLD (lit)", "11111000U00111111111iiiiiiiiiiii") +INST(thumb32_PLD_reg, "PLD (reg)", "1111100000W1nnnn1111000000iimmmm") +INST(thumb32_PLD_imm8, "PLD (imm8)", "1111100000W1nnnn11111100iiiiiiii") +INST(thumb32_PLD_imm12, "PLD (imm12)", "1111100010W1nnnn1111iiiiiiiiiiii") //INST(thumb32_PLI_lit, "PLI (lit)", "11111001-00111111111------------") //INST(thumb32_PLI_reg, "PLI (reg)", "111110010001----1111000000------") //INST(thumb32_PLI_imm8, "PLI (imm8)", "111110010001----11111100--------") diff --git a/src/frontend/A32/translate/impl/thumb32_load_byte.cpp b/src/frontend/A32/translate/impl/thumb32_load_byte.cpp index 5f4e4104..40f6a07d 100644 --- a/src/frontend/A32/translate/impl/thumb32_load_byte.cpp +++ b/src/frontend/A32/translate/impl/thumb32_load_byte.cpp @@ -3,9 +3,46 @@ * SPDX-License-Identifier: 0BSD */ +#include #include "frontend/A32/translate/impl/translate_thumb.h" namespace Dynarmic::A32 { +static bool PLDHandler(ThumbTranslatorVisitor& v, bool W) { + if (!v.options.hook_hint_instructions) { + return true; + } + const auto exception = W ? Exception::PreloadDataWithIntentToWrite + : Exception::PreloadData; + return v.RaiseException(exception); +} + +bool ThumbTranslatorVisitor::thumb32_PLD_lit([[maybe_unused]] bool U, + [[maybe_unused]] Imm<12> imm12) { + return PLDHandler(*this, false); +} + +bool ThumbTranslatorVisitor::thumb32_PLD_imm8(bool W, + [[maybe_unused]] Reg n, + [[maybe_unused]] Imm<8> imm8) { + return PLDHandler(*this, W); +} + +bool ThumbTranslatorVisitor::thumb32_PLD_imm12(bool W, + [[maybe_unused]] Reg n, + [[maybe_unused]] Imm<12> imm12) { + return PLDHandler(*this, W); +} + +bool ThumbTranslatorVisitor::thumb32_PLD_reg(bool W, + [[maybe_unused]] Reg n, + [[maybe_unused]] Imm<2> imm2, + Reg m) { + if (m == Reg::PC) { + return UnpredictableInstruction(); + } + + return PLDHandler(*this, W); +} } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index ddaa7a3e..846c7d35 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -205,6 +205,12 @@ struct ThumbTranslatorVisitor final { bool thumb32_STRH(Reg n, Reg t, Imm<2> imm2, Reg m); bool thumb32_STR_reg(Reg n, Reg t, Imm<2> imm2, Reg m); + // thumb32 load byte and memory hints + bool thumb32_PLD_lit(bool U, Imm<12> imm12); + bool thumb32_PLD_imm8(bool W, Reg n, Imm<8> imm8); + bool thumb32_PLD_imm12(bool W, Reg n, Imm<12> imm12); + bool thumb32_PLD_reg(bool W, Reg n, Imm<2> imm2, Reg m); + // thumb32 data processing (register) instructions bool thumb32_ASR_reg(Reg m, Reg d, Reg s); bool thumb32_LSL_reg(Reg m, Reg d, Reg s); From c66afadbc19f3ffabd8035de622893bc8aa6cf6f Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 6 Mar 2021 09:55:29 -0500 Subject: [PATCH 3/5] thumb32: Implement PLI variants --- include/dynarmic/A32/config.h | 2 ++ src/frontend/A32/decoder/thumb32.inc | 8 ++--- .../A32/translate/impl/thumb32_load_byte.cpp | 33 +++++++++++++++++++ .../A32/translate/impl/translate_thumb.h | 4 +++ 4 files changed, 43 insertions(+), 4 deletions(-) diff --git a/include/dynarmic/A32/config.h b/include/dynarmic/A32/config.h index bb38be4a..da17ce82 100644 --- a/include/dynarmic/A32/config.h +++ b/include/dynarmic/A32/config.h @@ -48,6 +48,8 @@ enum class Exception { PreloadData, /// A PLDW instruction was executed. (Hint instruction.) PreloadDataWithIntentToWrite, + /// A PLI instruction was executed. (Hint instruction.) + PreloadInstruction, }; /// These function pointers may be inserted into compiled code. diff --git a/src/frontend/A32/decoder/thumb32.inc b/src/frontend/A32/decoder/thumb32.inc index a5660a52..4a1c4600 100644 --- a/src/frontend/A32/decoder/thumb32.inc +++ b/src/frontend/A32/decoder/thumb32.inc @@ -149,10 +149,10 @@ INST(thumb32_PLD_lit, "PLD (lit)", "11111000U00111111111ii INST(thumb32_PLD_reg, "PLD (reg)", "1111100000W1nnnn1111000000iimmmm") INST(thumb32_PLD_imm8, "PLD (imm8)", "1111100000W1nnnn11111100iiiiiiii") INST(thumb32_PLD_imm12, "PLD (imm12)", "1111100010W1nnnn1111iiiiiiiiiiii") -//INST(thumb32_PLI_lit, "PLI (lit)", "11111001-00111111111------------") -//INST(thumb32_PLI_reg, "PLI (reg)", "111110010001----1111000000------") -//INST(thumb32_PLI_imm8, "PLI (imm8)", "111110010001----11111100--------") -//INST(thumb32_PLI_imm12, "PLI (imm12)", "111110011001----1111------------") +INST(thumb32_PLI_lit, "PLI (lit)", "11111001U00111111111iiiiiiiiiiii") +INST(thumb32_PLI_reg, "PLI (reg)", "111110010001nnnn1111000000iimmmm") +INST(thumb32_PLI_imm8, "PLI (imm8)", "111110010001nnnn11111100iiiiiiii") +INST(thumb32_PLI_imm12, "PLI (imm12)", "111110011001nnnn1111iiiiiiiiiiii") //INST(thumb32_LDRB_lit, "LDRB (lit)", "11111000-0011111----------------") //INST(thumb32_LDRB_reg, "LDRB (reg)", "111110000001--------000000------") //INST(thumb32_LDRBT, "LDRBT", "111110000001--------1110--------") diff --git a/src/frontend/A32/translate/impl/thumb32_load_byte.cpp b/src/frontend/A32/translate/impl/thumb32_load_byte.cpp index 40f6a07d..eb5474ce 100644 --- a/src/frontend/A32/translate/impl/thumb32_load_byte.cpp +++ b/src/frontend/A32/translate/impl/thumb32_load_byte.cpp @@ -17,6 +17,14 @@ static bool PLDHandler(ThumbTranslatorVisitor& v, bool W) { return v.RaiseException(exception); } +static bool PLIHandler(ThumbTranslatorVisitor& v) { + if (!v.options.hook_hint_instructions) { + return true; + } + + return v.RaiseException(Exception::PreloadInstruction); +} + bool ThumbTranslatorVisitor::thumb32_PLD_lit([[maybe_unused]] bool U, [[maybe_unused]] Imm<12> imm12) { return PLDHandler(*this, false); @@ -45,4 +53,29 @@ bool ThumbTranslatorVisitor::thumb32_PLD_reg(bool W, return PLDHandler(*this, W); } +bool ThumbTranslatorVisitor::thumb32_PLI_lit([[maybe_unused]] bool U, + [[maybe_unused]] Imm<12> imm12) { + return PLIHandler(*this); +} + +bool ThumbTranslatorVisitor::thumb32_PLI_imm8([[maybe_unused]] Reg n, + [[maybe_unused]] Imm<8> imm8) { + return PLIHandler(*this); +} + +bool ThumbTranslatorVisitor::thumb32_PLI_imm12([[maybe_unused]] Reg n, + [[maybe_unused]] Imm<12> imm12) { + return PLIHandler(*this); +} + +bool ThumbTranslatorVisitor::thumb32_PLI_reg([[maybe_unused]] Reg n, + [[maybe_unused]] Imm<2> imm2, + Reg m) { + if (m == Reg::PC) { + return UnpredictableInstruction(); + } + + return PLIHandler(*this); +} + } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index 846c7d35..cda76ce6 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -210,6 +210,10 @@ struct ThumbTranslatorVisitor final { bool thumb32_PLD_imm8(bool W, Reg n, Imm<8> imm8); bool thumb32_PLD_imm12(bool W, Reg n, Imm<12> imm12); bool thumb32_PLD_reg(bool W, Reg n, Imm<2> imm2, Reg m); + bool thumb32_PLI_lit(bool U, Imm<12> imm12); + bool thumb32_PLI_imm8(Reg n, Imm<8> imm8); + bool thumb32_PLI_imm12(Reg n, Imm<12> imm12); + bool thumb32_PLI_reg(Reg n, Imm<2> imm2, Reg m); // thumb32 data processing (register) instructions bool thumb32_ASR_reg(Reg m, Reg d, Reg s); From fe892732cff83122289247924e4ef7435091a0ed Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 6 Mar 2021 10:02:34 -0500 Subject: [PATCH 4/5] thumb32: Implement LDRB variants --- src/frontend/A32/decoder/thumb32.inc | 10 +-- .../A32/translate/impl/thumb32_load_byte.cpp | 74 +++++++++++++++++++ .../A32/translate/impl/translate_thumb.h | 5 ++ 3 files changed, 84 insertions(+), 5 deletions(-) diff --git a/src/frontend/A32/decoder/thumb32.inc b/src/frontend/A32/decoder/thumb32.inc index 4a1c4600..df2215d8 100644 --- a/src/frontend/A32/decoder/thumb32.inc +++ b/src/frontend/A32/decoder/thumb32.inc @@ -153,11 +153,11 @@ INST(thumb32_PLI_lit, "PLI (lit)", "11111001U00111111111ii INST(thumb32_PLI_reg, "PLI (reg)", "111110010001nnnn1111000000iimmmm") INST(thumb32_PLI_imm8, "PLI (imm8)", "111110010001nnnn11111100iiiiiiii") INST(thumb32_PLI_imm12, "PLI (imm12)", "111110011001nnnn1111iiiiiiiiiiii") -//INST(thumb32_LDRB_lit, "LDRB (lit)", "11111000-0011111----------------") -//INST(thumb32_LDRB_reg, "LDRB (reg)", "111110000001--------000000------") -//INST(thumb32_LDRBT, "LDRBT", "111110000001--------1110--------") -//INST(thumb32_LDRB_imm8, "LDRB (imm8)", "111110000001--------1-----------") -//INST(thumb32_LDRB_imm12, "LDRB (imm12)", "111110001001--------------------") +INST(thumb32_LDRB_lit, "LDRB (lit)", "11111000U0011111ttttiiiiiiiiiiii") +INST(thumb32_LDRB_reg, "LDRB (reg)", "111110000001nnnntttt000000iimmmm") +INST(thumb32_LDRBT, "LDRBT", "111110000001nnnntttt1110iiiiiiii") +INST(thumb32_LDRB_imm8, "LDRB (imm8)", "111110000001nnnntttt1PUWiiiiiiii") +INST(thumb32_LDRB_imm12, "LDRB (imm12)", "111110001001nnnnttttiiiiiiiiiiii") //INST(thumb32_LDRSB_lit, "LDRSB (lit)", "11111001-0011111----------------") //INST(thumb32_LDRSB_reg, "LDRSB (reg)", "111110010001--------000000------") //INST(thumb32_LDRSBT, "LDRSBT", "111110010001--------1110--------") diff --git a/src/frontend/A32/translate/impl/thumb32_load_byte.cpp b/src/frontend/A32/translate/impl/thumb32_load_byte.cpp index eb5474ce..5252baa6 100644 --- a/src/frontend/A32/translate/impl/thumb32_load_byte.cpp +++ b/src/frontend/A32/translate/impl/thumb32_load_byte.cpp @@ -78,4 +78,78 @@ bool ThumbTranslatorVisitor::thumb32_PLI_reg([[maybe_unused]] Reg n, return PLIHandler(*this); } +bool ThumbTranslatorVisitor::thumb32_LDRB_lit(bool U, Reg t, Imm<12> imm12) { + const u32 imm32 = imm12.ZeroExtend(); + const u32 base = ir.AlignPC(4); + const u32 address = U ? (base + imm32) : (base - imm32); + const auto data = ir.ZeroExtendByteToWord(ir.ReadMemory8(ir.Imm32(address))); + + ir.SetRegister(t, data); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_LDRB_imm8(Reg n, Reg t, bool P, bool U, bool W, Imm<8> imm8) { + if (t == Reg::PC && W) { + return UnpredictableInstruction(); + } + if (W && n == t) { + return UnpredictableInstruction(); + } + if (!P && !W) { + return UndefinedInstruction(); + } + + const u32 imm32 = imm8.ZeroExtend(); + const IR::U32 reg_n = ir.GetRegister(n); + const IR::U32 offset_address = U ? ir.Add(reg_n, ir.Imm32(imm32)) + : ir.Sub(reg_n, ir.Imm32(imm32)); + const IR::U32 address = P ? offset_address : reg_n; + const IR::U32 data = ir.ZeroExtendByteToWord(ir.ReadMemory8(address)); + + ir.SetRegister(t, data); + if (W) { + ir.SetRegister(n, offset_address); + } + return true; +} + +bool ThumbTranslatorVisitor::thumb32_LDRB_imm12(Reg n, Reg t, Imm<12> imm12) { + const auto imm32 = imm12.ZeroExtend(); + const auto reg_n = ir.GetRegister(n); + const auto address = ir.Add(reg_n, ir.Imm32(imm32)); + const auto data = ir.ZeroExtendByteToWord(ir.ReadMemory8(address)); + + ir.SetRegister(t, data); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_LDRB_reg(Reg n, Reg t, Imm<2> imm2, Reg m) { + if (m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto reg_n = ir.GetRegister(n); + const auto reg_m = ir.GetRegister(m); + const auto offset = ir.LogicalShiftLeft(reg_m, ir.Imm8(imm2.ZeroExtend())); + const auto address = ir.Add(reg_n, offset); + const auto data = ir.ZeroExtendByteToWord(ir.ReadMemory8(address)); + + ir.SetRegister(t, data); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_LDRBT(Reg n, Reg t, Imm<8> imm8) { + // TODO: Add an unpredictable instruction path if this + // is executed in hypervisor mode if we ever support + // privileged execution modes. + + if (t == Reg::PC) { + return UnpredictableInstruction(); + } + + // Treat it as a normal LDRB, given we don't support + // execution levels other than EL0 currently. + return thumb32_LDRB_imm8(n, t, true, true, false, imm8); +} + } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index cda76ce6..84729dd3 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -214,6 +214,11 @@ struct ThumbTranslatorVisitor final { bool thumb32_PLI_imm8(Reg n, Imm<8> imm8); bool thumb32_PLI_imm12(Reg n, Imm<12> imm12); bool thumb32_PLI_reg(Reg n, Imm<2> imm2, Reg m); + bool thumb32_LDRB_lit(bool U, Reg t, Imm<12> imm12); + bool thumb32_LDRB_reg(Reg n, Reg t, Imm<2> imm2, Reg m); + bool thumb32_LDRB_imm8(Reg n, Reg t, bool P, bool U, bool W, Imm<8> imm8); + bool thumb32_LDRB_imm12(Reg n, Reg t, Imm<12> imm12); + bool thumb32_LDRBT(Reg n, Reg t, Imm<8> imm8); // thumb32 data processing (register) instructions bool thumb32_ASR_reg(Reg m, Reg d, Reg s); From 52fdf801d0c78c207896d0df5dfc01a3c674cff3 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 6 Mar 2021 11:14:33 -0500 Subject: [PATCH 5/5] thumb32: Implement LDRSB variants --- src/frontend/A32/decoder/thumb32.inc | 10 +- .../A32/translate/impl/thumb32_load_byte.cpp | 131 +++++++++++++----- .../A32/translate/impl/translate_thumb.h | 5 + 3 files changed, 103 insertions(+), 43 deletions(-) diff --git a/src/frontend/A32/decoder/thumb32.inc b/src/frontend/A32/decoder/thumb32.inc index df2215d8..33a19f05 100644 --- a/src/frontend/A32/decoder/thumb32.inc +++ b/src/frontend/A32/decoder/thumb32.inc @@ -158,11 +158,11 @@ INST(thumb32_LDRB_reg, "LDRB (reg)", "111110000001nnnntttt00 INST(thumb32_LDRBT, "LDRBT", "111110000001nnnntttt1110iiiiiiii") INST(thumb32_LDRB_imm8, "LDRB (imm8)", "111110000001nnnntttt1PUWiiiiiiii") INST(thumb32_LDRB_imm12, "LDRB (imm12)", "111110001001nnnnttttiiiiiiiiiiii") -//INST(thumb32_LDRSB_lit, "LDRSB (lit)", "11111001-0011111----------------") -//INST(thumb32_LDRSB_reg, "LDRSB (reg)", "111110010001--------000000------") -//INST(thumb32_LDRSBT, "LDRSBT", "111110010001--------1110--------") -//INST(thumb32_LDRSB_imm8, "LDRSB (imm8)", "111110010001--------1-----------") -//INST(thumb32_LDRSB_imm12, "LDRSB (imm12)", "111110011001--------------------") +INST(thumb32_LDRSB_lit, "LDRSB (lit)", "11111001U0011111ttttiiiiiiiiiiii") +INST(thumb32_LDRSB_reg, "LDRSB (reg)", "111110010001nnnntttt000000iimmmm") +INST(thumb32_LDRSBT, "LDRSBT", "111110010001nnnntttt1110iiiiiiii") +INST(thumb32_LDRSB_imm8, "LDRSB (imm8)", "111110010001nnnntttt1PUWiiiiiiii") +INST(thumb32_LDRSB_imm12, "LDRSB (imm12)", "111110011001nnnnttttiiiiiiiiiiii") // Load Halfword and Memory Hints //INST(thumb32_LDRH_lit, "LDRH (lit)", "11111000-0111111----------------") diff --git a/src/frontend/A32/translate/impl/thumb32_load_byte.cpp b/src/frontend/A32/translate/impl/thumb32_load_byte.cpp index 5252baa6..2fc57708 100644 --- a/src/frontend/A32/translate/impl/thumb32_load_byte.cpp +++ b/src/frontend/A32/translate/impl/thumb32_load_byte.cpp @@ -25,6 +25,51 @@ static bool PLIHandler(ThumbTranslatorVisitor& v) { return v.RaiseException(Exception::PreloadInstruction); } +using ExtensionFunction = IR::U32 (IREmitter::*)(const IR::U8&); + +static bool LoadByteLiteral(ThumbTranslatorVisitor& v, bool U, Reg t, Imm<12> imm12, + ExtensionFunction ext_fn) { + const u32 imm32 = imm12.ZeroExtend(); + const u32 base = v.ir.AlignPC(4); + const u32 address = U ? (base + imm32) : (base - imm32); + const auto data = (v.ir.*ext_fn)(v.ir.ReadMemory8(v.ir.Imm32(address))); + + v.ir.SetRegister(t, data); + return true; +} + +static bool LoadByteRegister(ThumbTranslatorVisitor& v, Reg n, Reg t, Imm<2> imm2, Reg m, + ExtensionFunction ext_fn) { + if (m == Reg::PC) { + return v.UnpredictableInstruction(); + } + + const auto reg_n = v.ir.GetRegister(n); + const auto reg_m = v.ir.GetRegister(m); + const auto offset = v.ir.LogicalShiftLeft(reg_m, v.ir.Imm8(imm2.ZeroExtend())); + const auto address = v.ir.Add(reg_n, offset); + const auto data = (v.ir.*ext_fn)(v.ir.ReadMemory8(address)); + + v.ir.SetRegister(t, data); + return true; +} + +static bool LoadByteImmediate(ThumbTranslatorVisitor& v, Reg n, Reg t, bool P, bool U, bool W, + Imm<12> imm12, ExtensionFunction ext_fn) { + const u32 imm32 = imm12.ZeroExtend(); + const IR::U32 reg_n = v.ir.GetRegister(n); + const IR::U32 offset_address = U ? v.ir.Add(reg_n, v.ir.Imm32(imm32)) + : v.ir.Sub(reg_n, v.ir.Imm32(imm32)); + const IR::U32 address = P ? offset_address : reg_n; + const IR::U32 data = (v.ir.*ext_fn)(v.ir.ReadMemory8(address)); + + v.ir.SetRegister(t, data); + if (W) { + v.ir.SetRegister(n, offset_address); + } + return true; +} + bool ThumbTranslatorVisitor::thumb32_PLD_lit([[maybe_unused]] bool U, [[maybe_unused]] Imm<12> imm12) { return PLDHandler(*this, false); @@ -79,13 +124,7 @@ bool ThumbTranslatorVisitor::thumb32_PLI_reg([[maybe_unused]] Reg n, } bool ThumbTranslatorVisitor::thumb32_LDRB_lit(bool U, Reg t, Imm<12> imm12) { - const u32 imm32 = imm12.ZeroExtend(); - const u32 base = ir.AlignPC(4); - const u32 address = U ? (base + imm32) : (base - imm32); - const auto data = ir.ZeroExtendByteToWord(ir.ReadMemory8(ir.Imm32(address))); - - ir.SetRegister(t, data); - return true; + return LoadByteLiteral(*this, U, t, imm12, &IREmitter::ZeroExtendByteToWord); } bool ThumbTranslatorVisitor::thumb32_LDRB_imm8(Reg n, Reg t, bool P, bool U, bool W, Imm<8> imm8) { @@ -99,43 +138,17 @@ bool ThumbTranslatorVisitor::thumb32_LDRB_imm8(Reg n, Reg t, bool P, bool U, boo return UndefinedInstruction(); } - const u32 imm32 = imm8.ZeroExtend(); - const IR::U32 reg_n = ir.GetRegister(n); - const IR::U32 offset_address = U ? ir.Add(reg_n, ir.Imm32(imm32)) - : ir.Sub(reg_n, ir.Imm32(imm32)); - const IR::U32 address = P ? offset_address : reg_n; - const IR::U32 data = ir.ZeroExtendByteToWord(ir.ReadMemory8(address)); - - ir.SetRegister(t, data); - if (W) { - ir.SetRegister(n, offset_address); - } - return true; + return LoadByteImmediate(*this, n, t, P, U, W, Imm<12>{imm8.ZeroExtend()}, + &IREmitter::ZeroExtendByteToWord); } bool ThumbTranslatorVisitor::thumb32_LDRB_imm12(Reg n, Reg t, Imm<12> imm12) { - const auto imm32 = imm12.ZeroExtend(); - const auto reg_n = ir.GetRegister(n); - const auto address = ir.Add(reg_n, ir.Imm32(imm32)); - const auto data = ir.ZeroExtendByteToWord(ir.ReadMemory8(address)); - - ir.SetRegister(t, data); - return true; + return LoadByteImmediate(*this, n, t, true, true, false, imm12, + &IREmitter::ZeroExtendByteToWord); } bool ThumbTranslatorVisitor::thumb32_LDRB_reg(Reg n, Reg t, Imm<2> imm2, Reg m) { - if (m == Reg::PC) { - return UnpredictableInstruction(); - } - - const auto reg_n = ir.GetRegister(n); - const auto reg_m = ir.GetRegister(m); - const auto offset = ir.LogicalShiftLeft(reg_m, ir.Imm8(imm2.ZeroExtend())); - const auto address = ir.Add(reg_n, offset); - const auto data = ir.ZeroExtendByteToWord(ir.ReadMemory8(address)); - - ir.SetRegister(t, data); - return true; + return LoadByteRegister(*this, n, t, imm2, m, &IREmitter::ZeroExtendByteToWord); } bool ThumbTranslatorVisitor::thumb32_LDRBT(Reg n, Reg t, Imm<8> imm8) { @@ -152,4 +165,46 @@ bool ThumbTranslatorVisitor::thumb32_LDRBT(Reg n, Reg t, Imm<8> imm8) { return thumb32_LDRB_imm8(n, t, true, true, false, imm8); } +bool ThumbTranslatorVisitor::thumb32_LDRSB_lit(bool U, Reg t, Imm<12> imm12) { + return LoadByteLiteral(*this, U, t, imm12, &IREmitter::SignExtendByteToWord); +} + +bool ThumbTranslatorVisitor::thumb32_LDRSB_imm8(Reg n, Reg t, bool P, bool U, bool W, Imm<8> imm8) { + if (t == Reg::PC && W) { + return UnpredictableInstruction(); + } + if (W && n == t) { + return UnpredictableInstruction(); + } + if (!P && !W) { + return UndefinedInstruction(); + } + + return LoadByteImmediate(*this, n, t, P, U, W, Imm<12>{imm8.ZeroExtend()}, + &IREmitter::SignExtendByteToWord); +} + +bool ThumbTranslatorVisitor::thumb32_LDRSB_imm12(Reg n, Reg t, Imm<12> imm12) { + return LoadByteImmediate(*this, n, t, true, true, false, imm12, + &IREmitter::SignExtendByteToWord); +} + +bool ThumbTranslatorVisitor::thumb32_LDRSB_reg(Reg n, Reg t, Imm<2> imm2, Reg m) { + return LoadByteRegister(*this, n, t, imm2, m, &IREmitter::SignExtendByteToWord); +} + +bool ThumbTranslatorVisitor::thumb32_LDRSBT(Reg n, Reg t, Imm<8> imm8) { + // TODO: Add an unpredictable instruction path if this + // is executed in hypervisor mode if we ever support + // privileged execution modes. + + if (t == Reg::PC) { + return UnpredictableInstruction(); + } + + // Treat it as a normal LDRSB, given we don't support + // execution levels other than EL0 currently. + return thumb32_LDRSB_imm8(n, t, true, true, false, imm8); +} + } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index 84729dd3..a6eaca00 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -219,6 +219,11 @@ struct ThumbTranslatorVisitor final { bool thumb32_LDRB_imm8(Reg n, Reg t, bool P, bool U, bool W, Imm<8> imm8); bool thumb32_LDRB_imm12(Reg n, Reg t, Imm<12> imm12); bool thumb32_LDRBT(Reg n, Reg t, Imm<8> imm8); + bool thumb32_LDRSB_lit(bool U, Reg t, Imm<12> imm12); + bool thumb32_LDRSB_reg(Reg n, Reg t, Imm<2> imm2, Reg m); + bool thumb32_LDRSB_imm8(Reg n, Reg t, bool P, bool U, bool W, Imm<8> imm8); + bool thumb32_LDRSB_imm12(Reg n, Reg t, Imm<12> imm12); + bool thumb32_LDRSBT(Reg n, Reg t, Imm<8> imm8); // thumb32 data processing (register) instructions bool thumb32_ASR_reg(Reg m, Reg d, Reg s);