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A64: Implement UCVTF (vector, integer)'s double/single-precision variant

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Lioncash 2018-07-12 09:57:08 -04:00 committed by MerryMage
parent 4aa4885ba7
commit e7409fdfe4
2 changed files with 30 additions and 11 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -637,7 +637,7 @@ INST(SHLL, "SHLL, SHLL2", "0Q101
//INST(FCVTAU_3, "FCVTAU (vector)", "0Q10111001111001110010nnnnnddddd")
//INST(FCVTAU_4, "FCVTAU (vector)", "0Q1011100z100001110010nnnnnddddd")
//INST(UCVTF_int_3, "UCVTF (vector, integer)", "0Q10111001111001110110nnnnnddddd")
//INST(UCVTF_int_4, "UCVTF (vector, integer)", "0Q1011100z100001110110nnnnnddddd")
INST(UCVTF_int_4, "UCVTF (vector, integer)", "0Q1011100z100001110110nnnnnddddd")
INST(NOT, "NOT", "0Q10111000100000010110nnnnnddddd")
INST(RBIT_asimd, "RBIT (vector)", "0Q10111001100000010110nnnnnddddd")
INST(FNEG_1, "FNEG (vector)", "0Q10111011111000111110nnnnnddddd")

39
src/frontend/A64/translate/impl/simd_two_register_misc.cpp
View file

@ -81,6 +81,31 @@ bool FPCompareAgainstZero(TranslatorVisitor& v, bool Q, bool sz, Vec Vn, Vec Vd,
v.V(datasize, Vd, result);
return true;
}
enum class Signedness {
Signed,
Unsigned
};
bool IntegerConvertToFloat(TranslatorVisitor& v, bool Q, bool sz, Vec Vn, Vec Vd, Signedness signedness) {
if (sz && !Q) {
return v.ReservedValue();
}
const size_t datasize = Q ? 128 : 64;
const IR::U128 operand = v.V(datasize, Vn);
const IR::U128 result = [&] {
if (signedness == Signedness::Signed) {
return sz ? v.ir.FPVectorS64ToDouble(operand) : v.ir.FPVectorS32ToSingle(operand);
}
return sz ? v.ir.FPVectorU64ToDouble(operand) : v.ir.FPVectorU32ToSingle(operand);
}();
v.V(datasize, Vd, result);
return true;
}
} // Anonymous namespace
bool TranslatorVisitor::CNT(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
@ -341,17 +366,11 @@ bool TranslatorVisitor::REV64_asimd(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
}
bool TranslatorVisitor::SCVTF_int_4(bool Q, bool sz, Vec Vn, Vec Vd) {
if (sz && !Q) {
return ReservedValue();
}
return IntegerConvertToFloat(*this, Q, sz, Vn, Vd, Signedness::Signed);
}
const size_t datasize = Q ? 128 : 64;
const IR::U128 operand = V(datasize, Vn);
const IR::U128 result = sz ? ir.FPVectorS64ToDouble(operand) : ir.FPVectorS32ToSingle(operand);
V(datasize, Vd, result);
return true;
bool TranslatorVisitor::UCVTF_int_4(bool Q, bool sz, Vec Vn, Vec Vd) {
return IntegerConvertToFloat(*this, Q, sz, Vn, Vd, Signedness::Unsigned);
}
bool TranslatorVisitor::SHLL(bool Q, Imm<2> size, Vec Vn, Vec Vd) {