From e71612d3948f557a6985ff1cad675f9ee82561cc Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 30 Apr 2018 10:28:52 -0400 Subject: [PATCH] A64: Implement SSHL (scalar) --- src/frontend/A64/decoder/a64.inc | 2 +- .../A64/translate/impl/simd_scalar_three_same.cpp | 13 +++++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index 6a14e5bc..1327e8c3 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -447,7 +447,7 @@ INST(ADDP_pair, "ADDP (scalar)", "01011 //INST(SQSUB_1, "SQSUB", "01011110zz1mmmmm001011nnnnnddddd") INST(CMGT_reg_1, "CMGT (register)", "01011110zz1mmmmm001101nnnnnddddd") INST(CMGE_reg_1, "CMGE (register)", "01011110zz1mmmmm001111nnnnnddddd") -//INST(SSHL_1, "SSHL", "01011110zz1mmmmm010001nnnnnddddd") +INST(SSHL_1, "SSHL", "01011110zz1mmmmm010001nnnnnddddd") //INST(SQSHL_reg_1, "SQSHL (register)", "01011110zz1mmmmm010011nnnnnddddd") //INST(SRSHL_1, "SRSHL", "01011110zz1mmmmm010101nnnnnddddd") //INST(SQRSHL_1, "SQRSHL", "01011110zz1mmmmm010111nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp b/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp index 87c3e7bd..cfa7b91e 100644 --- a/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp +++ b/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp @@ -130,6 +130,19 @@ bool TranslatorVisitor::CMTST_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { return true; } +bool TranslatorVisitor::SSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { + if (size != 0b11) { + return ReservedValue(); + } + + const IR::U128 operand1 = V(64, Vn); + const IR::U128 operand2 = V(64, Vm); + const IR::U128 result = ir.VectorLogicalVShiftSigned(64, operand1, operand2); + + V(64, Vd, result); + return true; +} + bool TranslatorVisitor::SUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { if (size != 0b11) { return ReservedValue();