Start implementing Thumb disassembler
This commit is contained in:
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f31b530703
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10 changed files with 160 additions and 14 deletions
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@ -5,7 +5,7 @@ project(dynarmic)
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option(DYNARMIC_USE_SYSTEM_BOOST "Use the system boost libraries" ON)
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# Compiler flags
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add_compile_options(--std=c++14 -Wall -Werror -Wextra -pedantic -Wfatal-errors -Wno-unused-parameter -static-libgcc -static-libstdc++)
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add_compile_options(--std=c++14 -Wall -Werror -Wextra -pedantic -Wfatal-errors -Wno-unused-parameter -static -static-libgcc -static-libstdc++)
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# Arch detection
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include(CheckSymbolExists)
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@ -12,6 +12,7 @@ set(SRCS
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common/x64/cpu_detect.cpp
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common/x64/emitter.cpp
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frontend/disassembler_arm.cpp
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frontend/disassembler_thumb.cpp
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frontend/ir/ir.cpp
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frontend/ir_emitter.cpp
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frontend/translate.cpp
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@ -39,7 +40,7 @@ set(HEADERS
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frontend/decoder/arm.h
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frontend/decoder/decoder_detail.h
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frontend/decoder/thumb1.h
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frontend/disassembler_arm.h
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frontend/disassembler.h
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frontend/frontend_arm.h
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frontend/ir/ir.h
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frontend/ir/opcodes.h
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@ -221,7 +221,7 @@ void EmitX64::EmitMostSignificantBit(IR::Value* value_) {
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// TODO: Flag optimization
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code->SHL(32, R(result), Imm8(31));
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code->SHR(32, R(result), Imm8(31));
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}
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void EmitX64::EmitIsZero(IR::Value* value_) {
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@ -312,11 +312,11 @@ void EmitX64::EmitLogicalShiftRight(IR::Value* value_) {
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// TODO: Optimize this.
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code->CMP(32, R(shift), Imm8(32));
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code->CMP(8, R(shift), Imm8(32));
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auto Rs_gt32 = code->J_CC(CC_A);
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auto Rs_eq32 = code->J_CC(CC_E);
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// if (Rs & 0xFF == 0) goto end;
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code->TEST(32, R(shift), R(shift));
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code->TEST(8, R(shift), R(shift));
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auto Rs_zero = code->J_CC(CC_Z);
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// if (Rs & 0xFF < 32) {
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code->SHR(32, R(result), R(shift));
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@ -101,7 +101,7 @@ Gen::X64Reg RegAlloc::UseRegister(IR::Value* use_value, std::initializer_list<Ho
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code->MOV(32, Gen::R(hostloc_to_x64.at(new_location)), SpillToOpArg(current_location));
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hostloc_state[new_location] = HostLocState::Use;
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hostloc_to_value[new_location] = use_value;
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std::swap(hostloc_to_value[new_location], hostloc_to_value[current_location]);
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remaining_uses[use_value]--;
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} else if (HostLocIsRegister(current_location)) {
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ASSERT(hostloc_state[current_location] == HostLocState::Idle);
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@ -77,8 +77,8 @@ static const std::array<Thumb1Matcher<V>, 7> g_thumb1_instruction_table {{
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// { INST(&V::thumb1_AND_reg, "AND (reg)", "0100000000mmmddd") },
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// { INST(&V::thumb1_EOR_reg, "EOR (reg)", "0100000001mmmddd") },
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{ INST(&V::thumb1_LSL_reg, "LSL (reg)", "0100000010mmmddd") },
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{ INST(&V::thumb1_LSR_reg, "LSR (reg)", "0100000011sssddd") },
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{ INST(&V::thumb1_ASR_reg, "ASR (reg)", "0100000100sssddd") },
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{ INST(&V::thumb1_LSR_reg, "LSR (reg)", "0100000011mmmddd") },
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{ INST(&V::thumb1_ASR_reg, "ASR (reg)", "0100000100mmmddd") },
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//{ INST(&V::thumb1_ADCS_rr, "ADCS (rr)", "0100000101mmmddd") },
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//{ INST(&V::thumb1_SBCS_rr, "SBCS (rr)", "0100000110mmmddd") },
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//{ INST(&V::thumb1_RORS_rr, "RORS (rr)", "0100000111sssddd") },
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@ -14,6 +14,7 @@ namespace Dynarmic {
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namespace Arm {
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std::string DisassembleArm(u32 instruction);
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std::string DisassembleThumb16(u16 instruction);
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} // namespace Arm
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} // namespace Dynarmic
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141
src/frontend/disassembler_thumb.cpp
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141
src/frontend/disassembler_thumb.cpp
Normal file
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@ -0,0 +1,141 @@
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/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include <cstdlib>
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#include <string>
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#include "common/bit_util.h"
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#include "common/string_util.h"
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#include "frontend/arm_types.h"
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#include "frontend/decoder/thumb1.h"
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namespace Dynarmic {
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namespace Arm {
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class DisassemblerVisitor {
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public:
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const char* CondStr(Cond cond) {
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switch (cond) {
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case Cond::EQ:
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return "eq";
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case Cond::NE:
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return "ne";
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case Cond::CS:
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return "cs";
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case Cond::CC:
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return "cc";
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case Cond::MI:
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return "mi";
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case Cond::PL:
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return "pl";
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case Cond::VS:
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return "vs";
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case Cond::VC:
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return "vc";
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case Cond::HI:
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return "hi";
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case Cond::LS:
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return "ls";
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case Cond::GE:
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return "ge";
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case Cond::LT:
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return "lt";
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case Cond::GT:
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return "gt";
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case Cond::LE:
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return "le";
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case Cond::AL:
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return "";
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case Cond::NV:
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break;
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}
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assert(false);
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return "<internal error>";
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}
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template<typename T>
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const char* SignStr(T value) {
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return value >= 0 ? "+" : "-";
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}
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const char* RegStr(Reg reg) {
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switch (reg) {
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case Reg::R0:
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return "r0";
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case Reg::R1:
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return "r1";
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case Reg::R2:
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return "r2";
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case Reg::R3:
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return "r3";
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case Reg::R4:
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return "r4";
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case Reg::R5:
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return "r5";
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case Reg::R6:
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return "r6";
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case Reg::R7:
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return "r7";
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case Reg::R8:
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return "r8";
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case Reg::R9:
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return "r9";
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case Reg::R10:
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return "r10";
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case Reg::R11:
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return "r11";
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case Reg::R12:
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return "r12";
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case Reg::R13:
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return "sp";
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case Reg::R14:
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return "lr";
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case Reg::R15:
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return "pc";
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case Reg::INVALID_REG:
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break;
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}
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assert(false);
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return "<internal error>";
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}
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std::string thumb1_LSL_imm(Imm5 imm5, Reg m, Reg d) {
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return Common::StringFromFormat("lsls %s, %s, #%u", RegStr(d), RegStr(m), imm5);
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}
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std::string thumb1_LSR_imm(Imm5 imm5, Reg m, Reg d) {
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return Common::StringFromFormat("lsrs %s, %s, #%u", RegStr(d), RegStr(m), imm5);
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}
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std::string thumb1_ASR_imm(Imm5 imm5, Reg m, Reg d) {
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return Common::StringFromFormat("asrs %s, %s, #%u", RegStr(d), RegStr(m), imm5);
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}
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std::string thumb1_LSL_reg(Reg d_n, Reg m) {
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return Common::StringFromFormat("lsls %s, %s", RegStr(d_n), RegStr(m));
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}
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std::string thumb1_LSR_reg(Reg d_n, Reg m) {
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return Common::StringFromFormat("lsrs %s, %s", RegStr(d_n), RegStr(m));
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}
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std::string thumb1_ASR_reg(Reg d_n, Reg m) {
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return Common::StringFromFormat("asrs %s, %s", RegStr(d_n), RegStr(m));
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}
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std::string thumb1_UDF() {
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return Common::StringFromFormat("udf");
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}
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};
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std::string DisassembleThumb16(u16 instruction) {
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DisassemblerVisitor visitor;
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auto decoder = DecodeThumb16<DisassemblerVisitor>(instruction);
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return !decoder ? Common::StringFromFormat("UNKNOWN: %x", instruction) : decoder->call(visitor, instruction);
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}
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} // namespace Arm
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} // namespace Dynarmic
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@ -4,18 +4,19 @@
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* General Public License version 2 or any later version.
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*/
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#include <cinttypes>
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#include <cstring>
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#include <catch.hpp>
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#include <c++/5.4.0/cinttypes>
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#include "common/common_types.h"
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#include "frontend/disassembler.h"
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#include "interface/interface.h"
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#include "rand_int.h"
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#include "skyeye_interpreter/dyncom/arm_dyncom_interpreter.h"
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#include "skyeye_interpreter/skyeye_common/armstate.h"
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static std::array<u16, 1024> code_mem{};
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static std::array<u16, 3000> code_mem{};
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static u32 MemoryRead32(u32 vaddr);
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static void InterpreterFallback(u32 pc, Dynarmic::Jit* jit);
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@ -137,7 +138,7 @@ void FuzzJitThumb(const size_t instruction_count, const size_t instructions_to_e
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printf("\nInstruction Listing: \n");
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for (size_t i = 0; i < instruction_count; i++) {
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printf("%04x\n", code_mem[i]);
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printf("%s\n", Dynarmic::Arm::DisassembleThumb16(code_mem[i]).c_str());
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}
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printf("\nFinal Register Listing: \n");
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#endif
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FAIL();
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}
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if (run_number % 10 == 0) printf("%zu\r", run_number);
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}
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}
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@ -207,7 +210,7 @@ TEST_CASE("Fuzz Thumb instructions set 1", "[JitX64][Thumb]") {
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};
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SECTION("short blocks") {
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FuzzJitThumb(5, 6, 10000, instruction_select);
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FuzzJitThumb(5, 6, 100, instruction_select);
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}
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SECTION("long blocks") {
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@ -6,7 +6,7 @@
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#include <catch.hpp>
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#include "frontend/disassembler_arm.h"
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#include "frontend/disassembler.h"
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TEST_CASE( "Disassemble branch instructions", "[arm][disassembler]" ) {
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REQUIRE(Dynarmic::Arm::DisassembleArm(0xEAFFFFFE) == "b +#0");
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@ -83,5 +83,5 @@ TEST_CASE( "thumb: lsls r0, r1, #31", "[thumb]" ) {
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REQUIRE( jit.Regs()[0] == 0x80000000 );
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REQUIRE( jit.Regs()[1] == 0xffffffff );
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REQUIRE( jit.Regs()[15] == 2 );
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REQUIRE( jit.Cpsr() == 0x20000030 ); // C flag, Thumb, User-mode
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REQUIRE( jit.Cpsr() == 0xA0000030 ); // N, C flags, Thumb, User-mode
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}
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