Start implementing Thumb disassembler

CMakeLists.txt

@@ -5,7 +5,7 @@ project(dynarmic)
 option(DYNARMIC_USE_SYSTEM_BOOST "Use the system boost libraries" ON)
 
 # Compiler flags
-add_compile_options(--std=c++14 -Wall -Werror -Wextra -pedantic -Wfatal-errors -Wno-unused-parameter -static-libgcc -static-libstdc++)
+add_compile_options(--std=c++14 -Wall -Werror -Wextra -pedantic -Wfatal-errors -Wno-unused-parameter -static -static-libgcc -static-libstdc++)
 
 # Arch detection
 include(CheckSymbolExists)

src/CMakeLists.txt

@@ -12,6 +12,7 @@ set(SRCS
     common/x64/cpu_detect.cpp
     common/x64/emitter.cpp
     frontend/disassembler_arm.cpp
+    frontend/disassembler_thumb.cpp
     frontend/ir/ir.cpp
     frontend/ir_emitter.cpp
     frontend/translate.cpp
@@ -39,7 +40,7 @@ set(HEADERS
     frontend/decoder/arm.h
     frontend/decoder/decoder_detail.h
     frontend/decoder/thumb1.h
-    frontend/disassembler_arm.h
+    frontend/disassembler.h
     frontend/frontend_arm.h
     frontend/ir/ir.h
     frontend/ir/opcodes.h

src/backend_x64/emit_x64.cpp

@@ -221,7 +221,7 @@ void EmitX64::EmitMostSignificantBit(IR::Value* value_) {
 
     // TODO: Flag optimization
 
-    code->SHL(32, R(result), Imm8(31));
+    code->SHR(32, R(result), Imm8(31));
 }
 
 void EmitX64::EmitIsZero(IR::Value* value_) {
@@ -312,11 +312,11 @@ void EmitX64::EmitLogicalShiftRight(IR::Value* value_) {
 
         // TODO: Optimize this.
 
-        code->CMP(32, R(shift), Imm8(32));
+        code->CMP(8, R(shift), Imm8(32));
         auto Rs_gt32 = code->J_CC(CC_A);
         auto Rs_eq32 = code->J_CC(CC_E);
         // if (Rs & 0xFF == 0) goto end;
-        code->TEST(32, R(shift), R(shift));
+        code->TEST(8, R(shift), R(shift));
         auto Rs_zero = code->J_CC(CC_Z);
         // if (Rs & 0xFF < 32) {
         code->SHR(32, R(result), R(shift));

src/backend_x64/reg_alloc.cpp

@@ -101,7 +101,7 @@ Gen::X64Reg RegAlloc::UseRegister(IR::Value* use_value, std::initializer_list<Ho
         code->MOV(32, Gen::R(hostloc_to_x64.at(new_location)), SpillToOpArg(current_location));
 
         hostloc_state[new_location] = HostLocState::Use;
-        hostloc_to_value[new_location] = use_value;
+        std::swap(hostloc_to_value[new_location], hostloc_to_value[current_location]);
         remaining_uses[use_value]--;
     } else if (HostLocIsRegister(current_location)) {
         ASSERT(hostloc_state[current_location] == HostLocState::Idle);

src/frontend/decoder/thumb1.h

@@ -77,8 +77,8 @@ static const std::array<Thumb1Matcher<V>, 7> g_thumb1_instruction_table {{
 //    { INST(&V::thumb1_AND_reg,        "AND (reg)",                "0100000000mmmddd") },
 //    { INST(&V::thumb1_EOR_reg,        "EOR (reg)",                "0100000001mmmddd") },
     { INST(&V::thumb1_LSL_reg,        "LSL (reg)",                "0100000010mmmddd") },
-    { INST(&V::thumb1_LSR_reg,        "LSR (reg)",                "0100000011sssddd") },
+    { INST(&V::thumb1_LSR_reg,        "LSR (reg)",                "0100000011mmmddd") },
-    { INST(&V::thumb1_ASR_reg,        "ASR (reg)",                "0100000100sssddd") },
+    { INST(&V::thumb1_ASR_reg,        "ASR (reg)",                "0100000100mmmddd") },
     //{ INST(&V::thumb1_ADCS_rr,        "ADCS (rr)",                "0100000101mmmddd") },
     //{ INST(&V::thumb1_SBCS_rr,        "SBCS (rr)",                "0100000110mmmddd") },
     //{ INST(&V::thumb1_RORS_rr,        "RORS (rr)",                "0100000111sssddd") },

src/frontend/disassembler.h

@@ -14,6 +14,7 @@ namespace Dynarmic {
 namespace Arm {
 
 std::string DisassembleArm(u32 instruction);
+std::string DisassembleThumb16(u16 instruction);
 
 } // namespace Arm
 } // namespace Dynarmic

src/frontend/disassembler_thumb.cpp

@@ -0,0 +1,141 @@
+/* This file is part of the dynarmic project.
+ * Copyright (c) 2016 MerryMage
+ * This software may be used and distributed according to the terms of the GNU
+ * General Public License version 2 or any later version.
+ */
+
+#include <cstdlib>
+#include <string>
+
+#include "common/bit_util.h"
+#include "common/string_util.h"
+#include "frontend/arm_types.h"
+#include "frontend/decoder/thumb1.h"
+
+namespace Dynarmic {
+namespace Arm {
+
+class DisassemblerVisitor {
+public:
+    const char* CondStr(Cond cond) {
+        switch (cond) {
+            case Cond::EQ:
+                return "eq";
+            case Cond::NE:
+                return "ne";
+            case Cond::CS:
+                return "cs";
+            case Cond::CC:
+                return "cc";
+            case Cond::MI:
+                return "mi";
+            case Cond::PL:
+                return "pl";
+            case Cond::VS:
+                return "vs";
+            case Cond::VC:
+                return "vc";
+            case Cond::HI:
+                return "hi";
+            case Cond::LS:
+                return "ls";
+            case Cond::GE:
+                return "ge";
+            case Cond::LT:
+                return "lt";
+            case Cond::GT:
+                return "gt";
+            case Cond::LE:
+                return "le";
+            case Cond::AL:
+                return "";
+            case Cond::NV:
+                break;
+        }
+        assert(false);
+        return "<internal error>";
+    }
+
+    template<typename T>
+    const char* SignStr(T value) {
+        return value >= 0 ? "+" : "-";
+    }
+
+    const char* RegStr(Reg reg) {
+        switch (reg) {
+            case Reg::R0:
+                return "r0";
+            case Reg::R1:
+                return "r1";
+            case Reg::R2:
+                return "r2";
+            case Reg::R3:
+                return "r3";
+            case Reg::R4:
+                return "r4";
+            case Reg::R5:
+                return "r5";
+            case Reg::R6:
+                return "r6";
+            case Reg::R7:
+                return "r7";
+            case Reg::R8:
+                return "r8";
+            case Reg::R9:
+                return "r9";
+            case Reg::R10:
+                return "r10";
+            case Reg::R11:
+                return "r11";
+            case Reg::R12:
+                return "r12";
+            case Reg::R13:
+                return "sp";
+            case Reg::R14:
+                return "lr";
+            case Reg::R15:
+                return "pc";
+            case Reg::INVALID_REG:
+                break;
+        }
+        assert(false);
+        return "<internal error>";
+    }
+
+    std::string thumb1_LSL_imm(Imm5 imm5, Reg m, Reg d) {
+        return Common::StringFromFormat("lsls %s, %s, #%u", RegStr(d), RegStr(m), imm5);
+    }
+
+    std::string thumb1_LSR_imm(Imm5 imm5, Reg m, Reg d) {
+        return Common::StringFromFormat("lsrs %s, %s, #%u", RegStr(d), RegStr(m), imm5);
+    }
+
+    std::string thumb1_ASR_imm(Imm5 imm5, Reg m, Reg d) {
+        return Common::StringFromFormat("asrs %s, %s, #%u", RegStr(d), RegStr(m), imm5);
+    }
+
+    std::string thumb1_LSL_reg(Reg d_n, Reg m) {
+        return Common::StringFromFormat("lsls %s, %s", RegStr(d_n), RegStr(m));
+    }
+
+    std::string thumb1_LSR_reg(Reg d_n, Reg m) {
+        return Common::StringFromFormat("lsrs %s, %s", RegStr(d_n), RegStr(m));
+    }
+
+    std::string thumb1_ASR_reg(Reg d_n, Reg m) {
+        return Common::StringFromFormat("asrs %s, %s", RegStr(d_n), RegStr(m));
+    }
+
+    std::string thumb1_UDF() {
+        return Common::StringFromFormat("udf");
+    }
+};
+
+std::string DisassembleThumb16(u16 instruction) {
+    DisassemblerVisitor visitor;
+    auto decoder = DecodeThumb16<DisassemblerVisitor>(instruction);
+    return !decoder ? Common::StringFromFormat("UNKNOWN: %x", instruction) : decoder->call(visitor, instruction);
+}
+
+} // namespace Arm
+} // namespace Dynarmic

tests/arm/fuzz_thumb.cpp

@@ -4,18 +4,19 @@
  * General Public License version 2 or any later version.
  */
 
+#include <cinttypes>
 #include <cstring>
 
 #include <catch.hpp>
-#include <c++/5.4.0/cinttypes>
 
 #include "common/common_types.h"
+#include "frontend/disassembler.h"
 #include "interface/interface.h"
 #include "rand_int.h"
 #include "skyeye_interpreter/dyncom/arm_dyncom_interpreter.h"
 #include "skyeye_interpreter/skyeye_common/armstate.h"
 
-static std::array<u16, 1024> code_mem{};
+static std::array<u16, 3000> code_mem{};
 
 static u32 MemoryRead32(u32 vaddr);
 static void InterpreterFallback(u32 pc, Dynarmic::Jit* jit);
@@ -137,7 +138,7 @@ void FuzzJitThumb(const size_t instruction_count, const size_t instructions_to_e
 
             printf("\nInstruction Listing: \n");
             for (size_t i = 0; i < instruction_count; i++) {
-                printf("%04x\n", code_mem[i]);
+                printf("%s\n", Dynarmic::Arm::DisassembleThumb16(code_mem[i]).c_str());
             }
 
             printf("\nFinal Register Listing: \n");
@@ -151,6 +152,8 @@ void FuzzJitThumb(const size_t instruction_count, const size_t instructions_to_e
 #endif
             FAIL();
         }
+
+        if (run_number % 10 == 0) printf("%zu\r", run_number);
     }
 }
 
@@ -207,7 +210,7 @@ TEST_CASE("Fuzz Thumb instructions set 1", "[JitX64][Thumb]") {
     };
 
     SECTION("short blocks") {
-        FuzzJitThumb(5, 6, 10000, instruction_select);
+        FuzzJitThumb(5, 6, 100, instruction_select);
     }
 
     SECTION("long blocks") {

tests/arm/test_arm_disassembler.cpp

@@ -6,7 +6,7 @@
 
 #include <catch.hpp>
 
-#include "frontend/disassembler_arm.h"
+#include "frontend/disassembler.h"
 
 TEST_CASE( "Disassemble branch instructions", "[arm][disassembler]" ) {
     REQUIRE(Dynarmic::Arm::DisassembleArm(0xEAFFFFFE) == "b +#0");

tests/arm/test_thumb_instructions.cpp

@@ -83,5 +83,5 @@ TEST_CASE( "thumb: lsls r0, r1, #31", "[thumb]" ) {
     REQUIRE( jit.Regs()[0] == 0x80000000 );
     REQUIRE( jit.Regs()[1] == 0xffffffff );
     REQUIRE( jit.Regs()[15] == 2 );
-    REQUIRE( jit.Cpsr() == 0x20000030 ); // C flag, Thumb, User-mode
+    REQUIRE( jit.Cpsr() == 0xA0000030 ); // N, C flags, Thumb, User-mode
 }