From d7044bc751d8409e78e68967e6a42055ee360634 Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sat, 27 Jan 2018 23:42:30 +0000 Subject: [PATCH] assert: Use fmt in ASSERT_MSG --- src/backend_x64/a32_emit_x64.cpp | 4 ++- src/backend_x64/a64_emit_x64.cpp | 4 ++- src/backend_x64/emit_x64.cpp | 2 +- src/backend_x64/emit_x64_data_processing.cpp | 2 +- src/backend_x64/reg_alloc.cpp | 3 +- src/common/assert.h | 10 ++++--- src/frontend/A64/translate/impl/impl.cpp | 8 +++--- src/frontend/ir/opcodes.cpp | 28 +++++++++++++++---- src/frontend/ir/opcodes.h | 10 +++++-- .../dyncom/arm_dyncom_interpreter.cpp | 8 +++--- .../skyeye_common/armstate.cpp | 2 +- .../skyeye_common/vfp/vfp.cpp | 2 +- .../skyeye_common/vfp/vfpsingle.cpp | 2 +- tests/A32/testenv.h | 8 +++--- tests/A64/testenv.h | 7 ++--- tests/A64/unicorn_emu/unicorn.cpp | 4 +-- tests/CMakeLists.txt | 2 +- 17 files changed, 68 insertions(+), 38 deletions(-) diff --git a/src/backend_x64/a32_emit_x64.cpp b/src/backend_x64/a32_emit_x64.cpp index 021b2432..7f2f3784 100644 --- a/src/backend_x64/a32_emit_x64.cpp +++ b/src/backend_x64/a32_emit_x64.cpp @@ -7,6 +7,8 @@ #include #include +#include + #include #include "backend_x64/a32_emit_x64.h" @@ -108,7 +110,7 @@ A32EmitX64::BlockDescriptor A32EmitX64::Emit(IR::Block& block) { #undef A64OPC default: - ASSERT_MSG(false, "Invalid opcode %zu", static_cast(inst->GetOpcode())); + ASSERT_MSG(false, "Invalid opcode: {}", inst->GetOpcode()); break; } diff --git a/src/backend_x64/a64_emit_x64.cpp b/src/backend_x64/a64_emit_x64.cpp index 6e0d4df8..3e8a0449 100644 --- a/src/backend_x64/a64_emit_x64.cpp +++ b/src/backend_x64/a64_emit_x64.cpp @@ -7,6 +7,8 @@ #include #include +#include + #include "backend_x64/a64_emit_x64.h" #include "backend_x64/a64_jitstate.h" #include "backend_x64/abi.h" @@ -89,7 +91,7 @@ A64EmitX64::BlockDescriptor A64EmitX64::Emit(IR::Block& block) { #undef A64OPC default: - ASSERT_MSG(false, "Invalid opcode %zu", static_cast(inst->GetOpcode())); + ASSERT_MSG(false, "Invalid opcode: {}", inst->GetOpcode()); break; } diff --git a/src/backend_x64/emit_x64.cpp b/src/backend_x64/emit_x64.cpp index f0b04efd..ec80c6ad 100644 --- a/src/backend_x64/emit_x64.cpp +++ b/src/backend_x64/emit_x64.cpp @@ -240,7 +240,7 @@ Xbyak::Label EmitX64::EmitCond(IR::Cond cond) { break; } default: - ASSERT_MSG(false, "Unknown cond %zu", static_cast(cond)); + ASSERT_MSG(false, "Unknown cond {}", static_cast(cond)); break; } diff --git a/src/backend_x64/emit_x64_data_processing.cpp b/src/backend_x64/emit_x64_data_processing.cpp index 0bb7c0b9..abfbb2b1 100644 --- a/src/backend_x64/emit_x64_data_processing.cpp +++ b/src/backend_x64/emit_x64_data_processing.cpp @@ -162,7 +162,7 @@ static void EmitConditionalSelect(BlockOfCode* code, EmitContext& ctx, IR::Inst* code->mov(else_, then_); break; default: - ASSERT_MSG(false, "Invalid cond %zu", static_cast(args[0].GetImmediateCond())); + ASSERT_MSG(false, "Invalid cond {}", static_cast(args[0].GetImmediateCond())); } ctx.reg_alloc.DefineValue(inst, else_); diff --git a/src/backend_x64/reg_alloc.cpp b/src/backend_x64/reg_alloc.cpp index e3ea115e..9718c3c6 100644 --- a/src/backend_x64/reg_alloc.cpp +++ b/src/backend_x64/reg_alloc.cpp @@ -8,6 +8,7 @@ #include #include +#include #include #include "backend_x64/abi.h" @@ -49,7 +50,7 @@ static size_t GetBitWidth(IR::Type type) { case IR::Type::CoprocInfo: case IR::Type::Cond: case IR::Type::Void: - ASSERT_MSG(false, "Type %zu cannot be represented at runtime", static_cast(type)); + ASSERT_MSG(false, "Type {} cannot be represented at runtime", type); return 0; case IR::Type::Opaque: ASSERT_MSG(false, "Not a concrete type"); diff --git a/src/common/assert.h b/src/common/assert.h index 4b209535..edb0da3e 100644 --- a/src/common/assert.h +++ b/src/common/assert.h @@ -6,6 +6,8 @@ #include +#include + // For asserts we'd like to keep all the junk executed when an assert happens away from the // important code in the function. One way of doing this is to put all the relevant code inside a // lambda and force the compiler to not inline it. Unfortunately, MSVC seems to have no syntax to @@ -26,14 +28,14 @@ static void assert_noinline_call(const Fn& fn) { #define ASSERT(_a_) \ do if (!(_a_)) { assert_noinline_call([] { \ - fprintf(stderr, "Assertion Failed!: %s\n", #_a_); \ + fmt::print(stderr, "Assertion Failed!: {}\n", #_a_); \ }); } while (false) #define ASSERT_MSG(_a_, ...) \ do if (!(_a_)) { assert_noinline_call([&] { \ - fprintf(stderr, "Assertion Failed!: %s\n", #_a_); \ - fprintf(stderr, "Message: " __VA_ARGS__); \ - fprintf(stderr, "\n"); \ + fmt::print(stderr, "Assertion Failed!: {}\n", #_a_); \ + fmt::print(stderr, "Message: " __VA_ARGS__); \ + fmt::print(stderr, "\n"); \ }); } while (false) #define UNREACHABLE() ASSERT_MSG(false, "Unreachable code!") diff --git a/src/frontend/A64/translate/impl/impl.cpp b/src/frontend/A64/translate/impl/impl.cpp index 81973685..835d35c4 100644 --- a/src/frontend/A64/translate/impl/impl.cpp +++ b/src/frontend/A64/translate/impl/impl.cpp @@ -164,7 +164,7 @@ IR::UAnyU128 TranslatorVisitor::Mem(IR::U64 address, size_t bytesize, AccType /* case 16: return ir.ReadMemory128(address); default: - ASSERT_MSG(false, "Invalid bytesize parameter %zu", bytesize); + ASSERT_MSG(false, "Invalid bytesize parameter {}", bytesize); return {}; } } @@ -187,7 +187,7 @@ void TranslatorVisitor::Mem(IR::U64 address, size_t bytesize, AccType /*acctype* ir.WriteMemory128(address, value); return; default: - ASSERT_MSG(false, "Invalid bytesize parameter %zu", bytesize); + ASSERT_MSG(false, "Invalid bytesize parameter {}", bytesize); return; } } @@ -199,7 +199,7 @@ IR::U32U64 TranslatorVisitor::SignExtend(IR::UAny value, size_t to_size) { case 64: return ir.SignExtendToLong(value); default: - ASSERT_MSG(false, "Invalid size parameter %zu", to_size); + ASSERT_MSG(false, "Invalid size parameter {}", to_size); return {}; } } @@ -211,7 +211,7 @@ IR::U32U64 TranslatorVisitor::ZeroExtend(IR::UAny value, size_t to_size) { case 64: return ir.ZeroExtendToLong(value); default: - ASSERT_MSG(false, "Invalid size parameter %zu", to_size); + ASSERT_MSG(false, "Invalid size parameter {}", to_size); return {}; } } diff --git a/src/frontend/ir/opcodes.cpp b/src/frontend/ir/opcodes.cpp index 951f2992..98ee3133 100644 --- a/src/frontend/ir/opcodes.cpp +++ b/src/frontend/ir/opcodes.cpp @@ -6,8 +6,13 @@ #include #include +#include +#include #include +#include +#include + #include "frontend/ir/opcodes.h" namespace Dynarmic::IR { @@ -48,19 +53,32 @@ Type GetArgTypeOf(Opcode op, size_t arg_index) { return OpcodeInfo::opcode_info.at(op).arg_types.at(arg_index); } -const char* GetNameOf(Opcode op) { +std::string GetNameOf(Opcode op) { + if (OpcodeInfo::opcode_info.count(op) == 0) + return fmt::format("Unknown Opcode {}", static_cast(op)); return OpcodeInfo::opcode_info.at(op).name; } -const char* GetNameOf(Type type) { - static const std::array names = { - "Void", "A32Reg", "A32ExtReg", "A64Reg", "A64Vec", "Opaque", "U1", "U8", "U16", "U32", "U64", "F32", "F64", "CoprocInfo" +std::string GetNameOf(Type type) { + static const std::array names = { + "Void", "A32Reg", "A32ExtReg", "A64Reg", "A64Vec", "Opaque", "U1", "U8", "U16", "U32", "U64", "F32", "F64", "CoprocInfo", "NZCVFlags", "Cond" }; - return names.at(static_cast(type)); + const size_t index = static_cast(type); + if (index > names.size()) + return fmt::format("Unknown Type {}", index); + return names.at(index); } bool AreTypesCompatible(Type t1, Type t2) { return t1 == t2 || t1 == Type::Opaque || t2 == Type::Opaque; } +std::ostream& operator<<(std::ostream& o, Opcode opcode) { + return o << GetNameOf(opcode); +} + +std::ostream& operator<<(std::ostream& o, Type type) { + return o << GetNameOf(type); +} + } // namespace Dynarmic::IR diff --git a/src/frontend/ir/opcodes.h b/src/frontend/ir/opcodes.h index dfa6292f..08817955 100644 --- a/src/frontend/ir/opcodes.h +++ b/src/frontend/ir/opcodes.h @@ -6,6 +6,9 @@ #pragma once +#include +#include + #include "common/common_types.h" namespace Dynarmic::IR { @@ -66,12 +69,15 @@ size_t GetNumArgsOf(Opcode op); Type GetArgTypeOf(Opcode op, size_t arg_index); /// Get the name of an opcode. -const char* GetNameOf(Opcode op); +std::string GetNameOf(Opcode op); /// Get the name of a type. -const char* GetNameOf(Type type); +std::string GetNameOf(Type type); /// @returns true if t1 and t2 are compatible types bool AreTypesCompatible(Type t1, Type t2); +std::ostream& operator<<(std::ostream& o, Opcode opcode); +std::ostream& operator<<(std::ostream& o, Type type); + } // namespace Dynarmic::IR diff --git a/tests/A32/skyeye_interpreter/dyncom/arm_dyncom_interpreter.cpp b/tests/A32/skyeye_interpreter/dyncom/arm_dyncom_interpreter.cpp index 4001595c..fe8c6b21 100644 --- a/tests/A32/skyeye_interpreter/dyncom/arm_dyncom_interpreter.cpp +++ b/tests/A32/skyeye_interpreter/dyncom/arm_dyncom_interpreter.cpp @@ -822,8 +822,8 @@ static unsigned int InterpreterTranslateInstruction(const ARMul_State* cpu, cons // std::string disasm = ARM_Disasm::Disassemble(phys_addr, inst); // LOG_ERROR(Core_ARM11, "Decode failure.\tPC : [0x%x]\tInstruction : %s [%x]", phys_addr, disasm.c_str(), inst); // LOG_ERROR(Core_ARM11, "cpsr=0x%x, cpu->TFlag=%d, r15=0x%x", cpu->Cpsr, cpu->TFlag, cpu->Reg[15]); - ASSERT_MSG(false, "Decode failure.\tPC : [0x%x]\tInstruction : %s [%x]", phys_addr, "", inst); - ASSERT_MSG(false, "cpsr=0x%x, cpu->TFlag=%d, r15=0x%x", cpu->Cpsr, cpu->TFlag, cpu->Reg[15]); + ASSERT_MSG(false, "Decode failure.\tPC : [0x{:x}]\tInstruction : {} [{:x}]", phys_addr, "", inst); + ASSERT_MSG(false, "cpsr=0x{:x}, cpu->TFlag={}, r15=0x{:x}", cpu->Cpsr, cpu->TFlag, cpu->Reg[15]); CITRA_IGNORE_EXIT(-1); } inst_base = arm_instruction_trans[idx](inst, idx); @@ -1960,7 +1960,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { // LOG_ERROR(Core_ARM11, "MCRR executed | Coprocessor: %u, CRm %u, opc1: %u, Rt: %u, Rt2: %u", // inst_cream->cp_num, inst_cream->crm, inst_cream->opcode_1, inst_cream->rt, inst_cream->rt2); - ASSERT_MSG(false, "MCRR executed | Coprocessor: %u, CRm %u, opc1: %u, Rt: %u, Rt2: %u", + ASSERT_MSG(false, "MCRR executed | Coprocessor: {}, CRm {}, opc1: {}, Rt: {}, Rt2: {}", inst_cream->cp_num, inst_cream->crm, inst_cream->opcode_1, inst_cream->rt, inst_cream->rt2); } @@ -2048,7 +2048,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { // LOG_ERROR(Core_ARM11, "MRRC executed | Coprocessor: %u, CRm %u, opc1: %u, Rt: %u, Rt2: %u", // inst_cream->cp_num, inst_cream->crm, inst_cream->opcode_1, inst_cream->rt, inst_cream->rt2); - ASSERT_MSG(false, "MRRC executed | Coprocessor: %u, CRm %u, opc1: %u, Rt: %u, Rt2: %u", + ASSERT_MSG(false, "MRRC executed | Coprocessor: {}, CRm {}, opc1: {}, Rt: {}, Rt2: {}", inst_cream->cp_num, inst_cream->crm, inst_cream->opcode_1, inst_cream->rt, inst_cream->rt2); } diff --git a/tests/A32/skyeye_interpreter/skyeye_common/armstate.cpp b/tests/A32/skyeye_interpreter/skyeye_common/armstate.cpp index a251b392..2711892d 100644 --- a/tests/A32/skyeye_interpreter/skyeye_common/armstate.cpp +++ b/tests/A32/skyeye_interpreter/skyeye_common/armstate.cpp @@ -469,7 +469,7 @@ u32 ARMul_State::ReadCP15Register(u32 crn, u32 opcode_1, u32 crm, u32 opcode_2) } // LOG_ERROR(Core_ARM11, "MRC CRn=%u, CRm=%u, OP1=%u OP2=%u is not implemented. Returning zero.", crn, crm, opcode_1, opcode_2); - ASSERT_MSG(false, "MRC CRn=%u, CRm=%u, OP1=%u OP2=%u is not implemented. Returning zero.", crn, crm, opcode_1, opcode_2); + ASSERT_MSG(false, "MRC CRn={}, CRm={}, OP1={} OP2={} is not implemented. Returning zero.", crn, crm, opcode_1, opcode_2); return 0; } diff --git a/tests/A32/skyeye_interpreter/skyeye_common/vfp/vfp.cpp b/tests/A32/skyeye_interpreter/skyeye_common/vfp/vfp.cpp index ff594afb..d71a7664 100644 --- a/tests/A32/skyeye_interpreter/skyeye_common/vfp/vfp.cpp +++ b/tests/A32/skyeye_interpreter/skyeye_common/vfp/vfp.cpp @@ -161,7 +161,7 @@ void vfp_raise_exceptions(ARMul_State* state, u32 exceptions, u32 inst, u32 fpsc if (exceptions == VFP_EXCEPTION_ERROR) { // LOG_CRITICAL(Core_ARM11, "unhandled bounce %x", inst); // Crash(); - ASSERT_MSG(false, "unhandled bounce %x", inst); + ASSERT_MSG(false, "unhandled bounce {:08x}", inst); } /* diff --git a/tests/A32/skyeye_interpreter/skyeye_common/vfp/vfpsingle.cpp b/tests/A32/skyeye_interpreter/skyeye_common/vfp/vfpsingle.cpp index 40124219..289e0cdd 100644 --- a/tests/A32/skyeye_interpreter/skyeye_common/vfp/vfpsingle.cpp +++ b/tests/A32/skyeye_interpreter/skyeye_common/vfp/vfpsingle.cpp @@ -1295,7 +1295,7 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr) if (!fop->fn) { // LOG_CRITICAL(Core_ARM11, "could not find single op %d, inst=0x%x@0x%x", FEXT_TO_IDX(inst), inst, state->Reg[15]); // Crash(); - ASSERT_MSG(false, "could not find single op %d, inst=0x%x@0x%x", FEXT_TO_IDX(inst), inst, state->Reg[15]); + ASSERT_MSG(false, "could not find single op {}, inst=0x{:08x}@0x{:08x}", FEXT_TO_IDX(inst), inst, state->Reg[15]); goto invalid; } diff --git a/tests/A32/testenv.h b/tests/A32/testenv.h index 365c82bd..780c23ff 100644 --- a/tests/A32/testenv.h +++ b/tests/A32/testenv.h @@ -7,7 +7,7 @@ #pragma once #include -#include +#include #include #include @@ -71,11 +71,11 @@ public: MemoryWrite32(vaddr + 4, static_cast(value >> 32)); } - void InterpreterFallback(u32 pc, size_t num_instructions) override { ASSERT_MSG(false, "InterpreterFallback(%08x, %zu)", pc, num_instructions); } + void InterpreterFallback(u32 pc, size_t num_instructions) override { ASSERT_MSG(false, "InterpreterFallback({:08x}, {})", pc, num_instructions); } - void CallSVC(std::uint32_t swi) override { ASSERT_MSG(false, "CallSVC(%u)", swi); } + void CallSVC(std::uint32_t swi) override { ASSERT_MSG(false, "CallSVC({})", swi); } - void ExceptionRaised(u32 pc, Dynarmic::A32::Exception /*exception*/) override { ASSERT_MSG(false, "ExceptionRaised(%08x)", pc); } + void ExceptionRaised(u32 pc, Dynarmic::A32::Exception /*exception*/) override { ASSERT_MSG(false, "ExceptionRaised({:08x})", pc); } void AddTicks(std::uint64_t ticks) override { if (ticks > ticks_left) { diff --git a/tests/A64/testenv.h b/tests/A64/testenv.h index 2c215363..47bc20cb 100644 --- a/tests/A64/testenv.h +++ b/tests/A64/testenv.h @@ -7,7 +7,6 @@ #pragma once #include -#include #include #include @@ -77,11 +76,11 @@ public: MemoryWrite64(vaddr + 8, value[1]); } - void InterpreterFallback(u64 pc, size_t num_instructions) override { ASSERT_MSG(false, "InterpreterFallback(%" PRIx64 ", %zu)", pc, num_instructions); } + void InterpreterFallback(u64 pc, size_t num_instructions) override { ASSERT_MSG(false, "InterpreterFallback({:016x}, {})", pc, num_instructions); } - void CallSVC(std::uint32_t swi) override { ASSERT_MSG(false, "CallSVC(%u)", swi); } + void CallSVC(std::uint32_t swi) override { ASSERT_MSG(false, "CallSVC({})", swi); } - void ExceptionRaised(u64 pc, Dynarmic::A64::Exception /*exception*/) override { ASSERT_MSG(false, "ExceptionRaised(%" PRIx64 ")", pc); } + void ExceptionRaised(u64 pc, Dynarmic::A64::Exception /*exception*/) override { ASSERT_MSG(false, "ExceptionRaised({:016x})", pc); } void AddTicks(std::uint64_t ticks) override { if (ticks > ticks_left) { diff --git a/tests/A64/unicorn_emu/unicorn.cpp b/tests/A64/unicorn_emu/unicorn.cpp index c1ceb811..9985484d 100644 --- a/tests/A64/unicorn_emu/unicorn.cpp +++ b/tests/A64/unicorn_emu/unicorn.cpp @@ -10,7 +10,7 @@ #define CHECKED(expr) \ do { \ if (auto cerr_ = (expr)) { \ - ASSERT_MSG(false, "Call " #expr " failed with error: %u (%s)\n", cerr_, \ + ASSERT_MSG(false, "Call " #expr " failed with error: {} ({})\n", cerr_, \ uc_strerror(cerr_)); \ } \ } while (0) @@ -164,7 +164,7 @@ void Unicorn::InterruptHook(uc_engine* uc, u32 int_number, void* user_data) { this_->testenv.CallSVC(iss); break; default: - ASSERT_MSG(false, "Unhandled interrupt: int_number: %#x, esr: %#x (ec: %#x, iss: %#x)", int_number, esr, ec, iss); + ASSERT_MSG(false, "Unhandled interrupt: int_number: {:#x}, esr: {:#x} (ec: {:#x}, iss: {:#x})", int_number, esr, ec, iss); } } diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt index 68c1f4b3..ca44580d 100644 --- a/tests/CMakeLists.txt +++ b/tests/CMakeLists.txt @@ -47,7 +47,7 @@ endif() include(CreateDirectoryGroups) create_target_directory_groups(dynarmic_tests) -target_link_libraries(dynarmic_tests PRIVATE dynarmic boost catch) +target_link_libraries(dynarmic_tests PRIVATE dynarmic boost catch fmt) target_include_directories(dynarmic_tests PRIVATE . ../src) target_compile_options(dynarmic_tests PRIVATE ${DYNARMIC_CXX_FLAGS})