Implement thumb1_BIC_reg
This commit is contained in:
parent
98a64a92b1
commit
d11df9067d
8 changed files with 31 additions and 2 deletions
|
@ -534,6 +534,14 @@ void EmitX64::EmitOr(IR::Value* value_) {
|
|||
code->OR(32, R(result), R(orend));
|
||||
}
|
||||
|
||||
void EmitX64::EmitNot(IR::Value* value_) {
|
||||
auto value = reinterpret_cast<IR::Inst*>(value_);
|
||||
|
||||
X64Reg result = reg_alloc.UseDefRegister(value->GetArg(0).get(), value);
|
||||
|
||||
code->NOT(32, R(result));
|
||||
}
|
||||
|
||||
void EmitX64::EmitAddCycles(size_t cycles) {
|
||||
ASSERT(cycles < std::numeric_limits<u32>::max());
|
||||
code->SUB(64, MDisp(R15, offsetof(JitState, cycles_remaining)), Imm32(static_cast<u32>(cycles)));
|
||||
|
|
|
@ -58,6 +58,7 @@ public:
|
|||
void EmitAnd(IR::Value* value);
|
||||
void EmitEor(IR::Value* value);
|
||||
void EmitOr(IR::Value* value);
|
||||
void EmitNot(IR::Value* value);
|
||||
|
||||
void EmitAddCycles(size_t cycles);
|
||||
|
||||
|
|
|
@ -56,7 +56,7 @@ private:
|
|||
};
|
||||
|
||||
template <typename V>
|
||||
static const std::array<Thumb1Matcher<V>, 26> g_thumb1_instruction_table {{
|
||||
static const std::array<Thumb1Matcher<V>, 27> g_thumb1_instruction_table {{
|
||||
|
||||
#define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring)
|
||||
|
||||
|
@ -88,7 +88,7 @@ static const std::array<Thumb1Matcher<V>, 26> g_thumb1_instruction_table {{
|
|||
{ INST(&V::thumb1_CMN_reg, "CMN (reg)", "0100001011mmmnnn") },
|
||||
{ INST(&V::thumb1_ORR_reg, "ORR (reg)", "0100001100mmmddd") },
|
||||
//{ INST(&V::thumb1_MULS_rr, "MULS (rr)", "0100001101mmmddd") },
|
||||
//{ INST(&V::thumb1_BICS_rr, "BICS (rr)", "0100001110mmmddd") },
|
||||
{ INST(&V::thumb1_BIC_reg, "BIC (reg)", "0100001110mmmddd") },
|
||||
//{ INST(&V::thumb1_MVNS_rr, "MVNS (rr)", "0100001111mmmddd") },
|
||||
|
||||
// Special data instructions
|
||||
|
|
|
@ -199,6 +199,10 @@ public:
|
|||
return Common::StringFromFormat("orrs %s, %s", RegStr(d_n), RegStr(m));
|
||||
}
|
||||
|
||||
std::string thumb1_BIC_reg(Reg m, Reg d_n) {
|
||||
return Common::StringFromFormat("bics %s, %s", RegStr(d_n), RegStr(m));
|
||||
}
|
||||
|
||||
std::string thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
|
||||
Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;
|
||||
return Common::StringFromFormat("add %s, %s", RegStr(d_n), RegStr(m));
|
||||
|
|
|
@ -35,3 +35,4 @@ OPCODE(SubWithCarry, T::U32, T::U32, T::U32,
|
|||
OPCODE(And, T::U32, T::U32, T::U32 )
|
||||
OPCODE(Eor, T::U32, T::U32, T::U32 )
|
||||
OPCODE(Or, T::U32, T::U32, T::U32 )
|
||||
OPCODE(Not, T::U32, T::U32 )
|
||||
|
|
|
@ -132,6 +132,10 @@ IR::ValuePtr IREmitter::Or(IR::ValuePtr a, IR::ValuePtr b) {
|
|||
return Inst(IR::Opcode::Or, {a, b});
|
||||
}
|
||||
|
||||
IR::ValuePtr IREmitter::Not(IR::ValuePtr a) {
|
||||
return Inst(IR::Opcode::Not, {a});
|
||||
}
|
||||
|
||||
void IREmitter::SetTerm(const IR::Terminal& terminal) {
|
||||
ASSERT_MSG(block.terminal.which() == 0, "Terminal has already been set.");
|
||||
block.terminal = terminal;
|
||||
|
|
|
@ -61,6 +61,7 @@ public:
|
|||
IR::ValuePtr And(IR::ValuePtr a, IR::ValuePtr b);
|
||||
IR::ValuePtr Eor(IR::ValuePtr a, IR::ValuePtr b);
|
||||
IR::ValuePtr Or(IR::ValuePtr a, IR::ValuePtr b);
|
||||
IR::ValuePtr Not(IR::ValuePtr a);
|
||||
|
||||
void SetTerm(const IR::Terminal& terminal);
|
||||
|
||||
|
|
|
@ -297,6 +297,16 @@ struct TranslatorVisitor final {
|
|||
ir.SetZFlag(ir.IsZero(result));
|
||||
return true;
|
||||
}
|
||||
bool thumb1_BIC_reg(Reg m, Reg d_n) {
|
||||
Reg d = d_n, n = d_n;
|
||||
// BICS <Rdn>, <Rm>
|
||||
// Rd cannot encode R15.
|
||||
auto result = ir.And(ir.GetRegister(n), ir.Not(ir.GetRegister(m)));
|
||||
ir.SetRegister(d, result);
|
||||
ir.SetNFlag(ir.MostSignificantBit(result));
|
||||
ir.SetZFlag(ir.IsZero(result));
|
||||
return true;
|
||||
}
|
||||
|
||||
bool thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
|
||||
Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;
|
||||
|
|
Loading…
Reference in a new issue