From cdd658935ca98dd4027c6810e0c6beaf016c9157 Mon Sep 17 00:00:00 2001
From: Liam <byteslice@airmail.cc>
Date: Sun, 13 Nov 2022 14:01:16 -0500
Subject: [PATCH] Fix compile

---
 src/dynarmic/backend/arm64/a64_address_space.cpp     |  4 ++--
 src/dynarmic/backend/arm64/a64_interface.cpp         |  2 +-
 src/dynarmic/backend/arm64/emit_arm64_a64.cpp        | 10 +---------
 src/dynarmic/backend/arm64/emit_arm64_a64_memory.cpp |  2 +-
 4 files changed, 5 insertions(+), 13 deletions(-)

diff --git a/src/dynarmic/backend/arm64/a64_address_space.cpp b/src/dynarmic/backend/arm64/a64_address_space.cpp
index f59e663d..b2232aeb 100644
--- a/src/dynarmic/backend/arm64/a64_address_space.cpp
+++ b/src/dynarmic/backend/arm64/a64_address_space.cpp
@@ -47,7 +47,7 @@ static void* EmitExclusiveReadCallTrampoline(oaknut::CodeGenerator& code, const
 
     oaknut::Label l_addr, l_this;
 
-    auto fn = [](const A32::UserConfig& conf, A32::VAddr vaddr) -> T {
+    auto fn = [](const A64::UserConfig& conf, A64::VAddr vaddr) -> T {
         return conf.global_monitor->ReadAndMark<T>(conf.processor_id, vaddr, [&]() -> T {
             return (conf.callbacks->*callback)(vaddr);
         });
@@ -176,7 +176,7 @@ void A64AddressSpace::EmitPrelude() {
     prelude_info.exclusive_write_memory_16 = EmitExclusiveWriteCallTrampoline<&A64::UserCallbacks::MemoryWriteExclusive16, u16>(code, conf);
     prelude_info.exclusive_write_memory_32 = EmitExclusiveWriteCallTrampoline<&A64::UserCallbacks::MemoryWriteExclusive32, u32>(code, conf);
     prelude_info.exclusive_write_memory_64 = EmitExclusiveWriteCallTrampoline<&A64::UserCallbacks::MemoryWriteExclusive64, u64>(code, conf);
-    prelude_info.exclusive_write_memory_128 = EmitExclusiveWriteCallTrampoline<&A64::UserCallbacks::MemoryWriteExclusive64, Vector>(code, conf);
+    prelude_info.exclusive_write_memory_128 = EmitExclusiveWriteCallTrampoline<&A64::UserCallbacks::MemoryWriteExclusive128, Vector>(code, conf);
     prelude_info.call_svc = EmitCallTrampoline<&A64::UserCallbacks::CallSVC>(code, conf.callbacks);
     prelude_info.exception_raised = EmitCallTrampoline<&A64::UserCallbacks::ExceptionRaised>(code, conf.callbacks);
     prelude_info.isb_raised = EmitCallTrampoline<&A64::UserCallbacks::InstructionSynchronizationBarrierRaised>(code, conf.callbacks);
diff --git a/src/dynarmic/backend/arm64/a64_interface.cpp b/src/dynarmic/backend/arm64/a64_interface.cpp
index 92827f16..37c8ec5a 100644
--- a/src/dynarmic/backend/arm64/a64_interface.cpp
+++ b/src/dynarmic/backend/arm64/a64_interface.cpp
@@ -316,7 +316,7 @@ void Jit::DumpDisassembly() const {
 }
 
 std::vector<std::string> Jit::Disassemble() const {
-    impl->Disassemble();
+    return impl->Disassemble();
 }
 
 }  // namespace Dynarmic::A64
diff --git a/src/dynarmic/backend/arm64/emit_arm64_a64.cpp b/src/dynarmic/backend/arm64/emit_arm64_a64.cpp
index bf7f6043..f0a35ff6 100644
--- a/src/dynarmic/backend/arm64/emit_arm64_a64.cpp
+++ b/src/dynarmic/backend/arm64/emit_arm64_a64.cpp
@@ -41,7 +41,6 @@ void EmitIR<IR::Opcode::A64SetCheckBit>(oaknut::CodeGenerator& code, EmitContext
 
 template<>
 void EmitIR<IR::Opcode::A64GetCFlag>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
-    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
     auto Wresult = ctx.reg_alloc.WriteW(inst);
     RegAlloc::Realize(Wresult);
     code.LDR(Wresult, Xstate, offsetof(A64JitState, cpsr_nzcv));
@@ -50,7 +49,6 @@ void EmitIR<IR::Opcode::A64GetCFlag>(oaknut::CodeGenerator& code, EmitContext& c
 
 template<>
 void EmitIR<IR::Opcode::A64GetNZCVRaw>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
-    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
     auto Wnzcv = ctx.reg_alloc.WriteW(inst);
     RegAlloc::Realize(Wnzcv);
 
@@ -125,8 +123,6 @@ void EmitIR<IR::Opcode::A64GetQ>(oaknut::CodeGenerator& code, EmitContext& ctx,
 
 template<>
 void EmitIR<IR::Opcode::A64GetSP>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
-    const A64::Reg reg = inst->GetArg(0).GetA64RegRef();
-
     auto Xresult = ctx.reg_alloc.WriteX(inst);
     RegAlloc::Realize(Xresult);
 
@@ -135,8 +131,6 @@ void EmitIR<IR::Opcode::A64GetSP>(oaknut::CodeGenerator& code, EmitContext& ctx,
 
 template<>
 void EmitIR<IR::Opcode::A64GetFPCR>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
-    const A64::Reg reg = inst->GetArg(0).GetA64RegRef();
-
     auto Wresult = ctx.reg_alloc.WriteW(inst);
     RegAlloc::Realize(Wresult);
 
@@ -145,8 +139,6 @@ void EmitIR<IR::Opcode::A64GetFPCR>(oaknut::CodeGenerator& code, EmitContext& ct
 
 template<>
 void EmitIR<IR::Opcode::A64GetFPSR>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
-    const A64::Reg reg = inst->GetArg(0).GetA64RegRef();
-
     auto Wresult = ctx.reg_alloc.WriteW(inst);
     RegAlloc::Realize(Wresult);
 
@@ -310,7 +302,7 @@ void EmitIR<IR::Opcode::A64DataMemoryBarrier>(oaknut::CodeGenerator& code, EmitC
 }
 
 template<>
-void EmitIR<IR::Opcode::A64InstructionSynchronizationBarrier>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
+void EmitIR<IR::Opcode::A64InstructionSynchronizationBarrier>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst*) {
     if (!ctx.conf.hook_isb) {
         return;
     }
diff --git a/src/dynarmic/backend/arm64/emit_arm64_a64_memory.cpp b/src/dynarmic/backend/arm64/emit_arm64_a64_memory.cpp
index 75fe7335..38062956 100644
--- a/src/dynarmic/backend/arm64/emit_arm64_a64_memory.cpp
+++ b/src/dynarmic/backend/arm64/emit_arm64_a64_memory.cpp
@@ -82,7 +82,7 @@ static void EmitExclusiveWriteMemory(oaknut::CodeGenerator& code, EmitContext& c
 }
 
 template<>
-void EmitIR<IR::Opcode::A64ClearExclusive>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst*) {
+void EmitIR<IR::Opcode::A64ClearExclusive>(oaknut::CodeGenerator& code, EmitContext&, IR::Inst*) {
     code.STR(WZR, Xstate, offsetof(A64JitState, exclusive_state));
 }