Add support for the APSR.Q flag
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11e0688e5f
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ccb2aa96a5
4 changed files with 21 additions and 0 deletions
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@ -260,6 +260,21 @@ void EmitX64::EmitSetVFlag(IR::Block&, IR::Inst* inst) {
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}
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}
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void EmitX64::EmitOrQFlag(IR::Block&, IR::Inst* inst) {
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constexpr size_t flag_bit = 27;
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constexpr u32 flag_mask = 1u << flag_bit;
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IR::Value arg = inst->GetArg(0);
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if (arg.IsImmediate()) {
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if (arg.GetU1())
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code->OR(32, MJitStateCpsr(), Imm32(flag_mask));
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} else {
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X64Reg to_store = reg_alloc.UseScratchRegister(arg.GetInst(), any_gpr);
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code->SHL(32, R(to_store), Imm8(flag_bit));
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code->OR(32, MJitStateCpsr(), R(to_store));
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}
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}
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void EmitX64::EmitBXWritePC(IR::Block&, IR::Inst* inst) {
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const u32 T_bit = 1 << 5;
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auto arg = inst->GetArg(0);
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@ -118,6 +118,10 @@ void IREmitter::SetVFlag(const IR::Value& value) {
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Inst(IR::Opcode::SetVFlag, {value});
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}
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void IREmitter::OrQFlag(const IR::Value& value) {
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Inst(IR::Opcode::OrQFlag, {value});
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}
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IR::Value IREmitter::Pack2x32To1x64(const IR::Value& lo, const IR::Value& hi)
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{
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return Inst(IR::Opcode::Pack2x32To1x64, {lo, hi});
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@ -55,6 +55,7 @@ public:
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void SetZFlag(const IR::Value& value);
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void SetCFlag(const IR::Value& value);
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void SetVFlag(const IR::Value& value);
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void OrQFlag(const IR::Value& value);
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IR::Value Pack2x32To1x64(const IR::Value& lo, const IR::Value& hi);
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IR::Value LeastSignificantWord(const IR::Value& value);
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@ -18,6 +18,7 @@ OPCODE(GetCFlag, T::U1,
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OPCODE(SetCFlag, T::Void, T::U1 )
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OPCODE(GetVFlag, T::U1, )
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OPCODE(SetVFlag, T::Void, T::U1 )
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OPCODE(OrQFlag, T::Void, T::U1 )
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OPCODE(BXWritePC, T::Void, T::U32 )
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OPCODE(CallSupervisor, T::Void, T::U32 )
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