From ca40015145ec74391d3ba340dc50d121b5ef5269 Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Fri, 5 Aug 2016 14:07:27 +0100
Subject: [PATCH] IR: Add Breakpoint IR instruction (for debugging purposes,
 emits a host-breakpoint)

---
 src/backend_x64/emit_x64.cpp   | 4 ++++
 src/frontend/ir/ir_emitter.cpp | 4 ++++
 src/frontend/ir/ir_emitter.h   | 2 ++
 src/frontend/ir/opcodes.inc    | 1 +
 4 files changed, 11 insertions(+)

diff --git a/src/backend_x64/emit_x64.cpp b/src/backend_x64/emit_x64.cpp
index 610250bc..62ea36db 100644
--- a/src/backend_x64/emit_x64.cpp
+++ b/src/backend_x64/emit_x64.cpp
@@ -87,6 +87,10 @@ CodePtr EmitX64::Emit(const Arm::LocationDescriptor descriptor, Dynarmic::IR::Bl
     return code_ptr;
 }
 
+void EmitX64::EmitBreakpoint(IR::Block&, IR::Inst*) {
+    code->INT3();
+}
+
 void EmitX64::EmitIdentity(IR::Block& block, IR::Inst* inst) {
     // TODO: Possible unnecessary mov here.
     reg_alloc.UseDefRegister(inst->GetArg(0), inst, any_gpr);
diff --git a/src/frontend/ir/ir_emitter.cpp b/src/frontend/ir/ir_emitter.cpp
index d025d1d5..037f5992 100644
--- a/src/frontend/ir/ir_emitter.cpp
+++ b/src/frontend/ir/ir_emitter.cpp
@@ -261,6 +261,10 @@ void IREmitter::WriteMemory64(const IR::Value& vaddr, const IR::Value& value) {
     }
 }
 
+void IREmitter::Breakpoint() {
+    Inst(IR::Opcode::Breakpoint, {});
+}
+
 void IREmitter::SetTerm(const IR::Terminal& terminal) {
     ASSERT_MSG(block.terminal.which() == 0, "Terminal has already been set.");
     block.terminal = terminal;
diff --git a/src/frontend/ir/ir_emitter.h b/src/frontend/ir/ir_emitter.h
index 202c12f3..41b9a2e2 100644
--- a/src/frontend/ir/ir_emitter.h
+++ b/src/frontend/ir/ir_emitter.h
@@ -89,6 +89,8 @@ public:
     void WriteMemory32(const IR::Value& vaddr, const IR::Value& value);
     void WriteMemory64(const IR::Value& vaddr, const IR::Value& value);
 
+    void Breakpoint();
+
     void SetTerm(const IR::Terminal& terminal);
 
 private:
diff --git a/src/frontend/ir/opcodes.inc b/src/frontend/ir/opcodes.inc
index a1f2754c..fc9ff984 100644
--- a/src/frontend/ir/opcodes.inc
+++ b/src/frontend/ir/opcodes.inc
@@ -1,6 +1,7 @@
 //     opcode name,             return type,    arg1 type,      arg2 type,      arg3 type,      ...
 
 OPCODE(Identity,                T::Opaque,      T::Opaque                                       )
+OPCODE(Breakpoint,              T::Void,                                                        )
 
 // ARM Context getters/setters
 OPCODE(GetRegister,             T::U32,         T::RegRef                                       )