fuzz_with_unicorn: Split utility functions into fuzz_util
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MerryMage
parent
ac51c2547d
commit
c96c534615
4 changed files with 92 additions and 65 deletions
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@ -11,6 +11,7 @@
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#include <catch.hpp>
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#include "common/common_types.h"
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#include "common/fp/fpcr.h"
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#include "common/fp/fpsr.h"
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#include "common/llvm_disassemble.h"
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@ -20,35 +21,17 @@
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#include "frontend/A64/translate/translate.h"
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#include "frontend/ir/basic_block.h"
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#include "frontend/ir/opcodes.h"
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#include "inst_gen.h"
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#include "fuzz_util.h"
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#include "rand_int.h"
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#include "testenv.h"
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#include "unicorn_emu/a64_unicorn.h"
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// Needs to be declaerd before <fmt/ostream.h>
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static std::ostream& operator<<(std::ostream& o, const Dynarmic::A64::Vector& vec) {
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return o << fmt::format("{:016x}'{:016x}", vec[1], vec[0]);
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}
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// Must be declared last for all necessary operator<< to be declared prior to this.
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#include <fmt/format.h>
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#include <fmt/ostream.h>
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using namespace Dynarmic;
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static Vector RandomVector() {
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return {RandInt<u64>(0, ~u64(0)), RandInt<u64>(0, ~u64(0))};
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}
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static u32 RandomFpcr() {
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FP::FPCR fpcr;
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fpcr.AHP(RandInt(0, 1) == 0);
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fpcr.DN(RandInt(0, 1) == 0);
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fpcr.FZ(RandInt(0, 1) == 0);
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fpcr.RMode(static_cast<FP::RoundingMode>(RandInt(0, 3)));
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fpcr.FZ16(RandInt(0, 1) == 0);
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return fpcr.Value();
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}
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static bool ShouldTestInst(u32 instruction, u64 pc, bool is_last_inst) {
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const A64::LocationDescriptor location{pc, {}};
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IR::Block block{location};
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@ -72,14 +55,18 @@ static bool ShouldTestInst(u32 instruction, u64 pc, bool is_last_inst) {
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}
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static u32 GenRandomInst(u64 pc, bool is_last_inst) {
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static const std::vector<InstructionGenerator> instruction_generators = []{
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static const struct InstructionGeneratorInfo {
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std::vector<InstructionGenerator> generators;
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std::vector<InstructionGenerator> invalid;
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} instructions = []{
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const std::vector<std::tuple<std::string, const char*>> list {
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#define INST(fn, name, bitstring) {#fn, bitstring},
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#include "frontend/A64/decoder/a64.inc"
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#undef INST
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};
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std::vector<InstructionGenerator> result;
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std::vector<InstructionGenerator> generators;
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std::vector<InstructionGenerator> invalid;
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// List of instructions not to test
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const std::vector<std::string> do_not_test {
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@ -98,20 +85,23 @@ static u32 GenRandomInst(u64 pc, bool is_last_inst) {
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continue;
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}
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if (std::find(do_not_test.begin(), do_not_test.end(), fn) != do_not_test.end()) {
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InstructionGenerator::AddInvalidInstruction(bitstring);
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invalid.emplace_back(InstructionGenerator{bitstring});
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continue;
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}
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result.emplace_back(InstructionGenerator{bitstring});
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generators.emplace_back(InstructionGenerator{bitstring});
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}
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return result;
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return InstructionGeneratorInfo{generators, invalid};
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}();
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while (true) {
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const size_t index = RandInt<size_t>(0, instruction_generators.size() - 1);
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const u32 instruction = instruction_generators[index].Generate();
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const size_t index = RandInt<size_t>(0, instructions.generators.size() - 1);
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const u32 inst = instructions.generators[index].Generate();
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if (ShouldTestInst(instruction, pc, is_last_inst)) {
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return instruction;
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if (std::any_of(instructions.invalid.begin(), instructions.invalid.end(), [inst](const auto& invalid) { return invalid.Match(inst); })) {
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continue;
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}
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if (ShouldTestInst(inst, pc, is_last_inst)) {
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return inst;
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}
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}
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}
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@ -156,11 +146,17 @@ static u32 GenFloatInst(u64 pc, bool is_last_inst) {
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}
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}
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static void RunTestInstance(const A64Unicorn::RegisterArray& regs, const A64Unicorn::VectorArray& vecs, const size_t instructions_start,
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const std::vector<u32>& instructions, const u32 pstate, const u32 fpcr) {
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static A64TestEnv jit_env{};
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static A64TestEnv uni_env{};
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static Dynarmic::A64::UserConfig GetUserConfig(A64TestEnv& jit_env) {
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Dynarmic::A64::UserConfig jit_user_config{&jit_env};
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// The below corresponds to the settings for qemu's aarch64_max_initfn
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jit_user_config.dczid_el0 = 7;
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jit_user_config.ctr_el0 = 0x80038003;
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return jit_user_config;
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}
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static void RunTestInstance(Dynarmic::A64::Jit& jit, A64Unicorn& uni, A64TestEnv& jit_env, A64TestEnv& uni_env,
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const A64Unicorn::RegisterArray& regs, const A64Unicorn::VectorArray& vecs, const size_t instructions_start,
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const std::vector<u32>& instructions, const u32 pstate, const u32 fpcr) {
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jit_env.code_mem = instructions;
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uni_env.code_mem = instructions;
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jit_env.code_mem.emplace_back(0x14000000); // B .
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@ -172,14 +168,6 @@ static void RunTestInstance(const A64Unicorn::RegisterArray& regs, const A64Unic
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jit_env.interrupts.clear();
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uni_env.interrupts.clear();
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Dynarmic::A64::UserConfig jit_user_config{&jit_env};
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// The below corresponds to the settings for qemu's aarch64_max_initfn
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jit_user_config.dczid_el0 = 7;
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jit_user_config.ctr_el0 = 0x80038003;
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static Dynarmic::A64::Jit jit{jit_user_config};
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static A64Unicorn uni{uni_env};
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const u64 initial_sp = RandInt<u64>(0x30'0000'0000, 0x40'0000'0000) * 4;
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jit.SetRegisters(regs);
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@ -283,6 +271,12 @@ static void RunTestInstance(const A64Unicorn::RegisterArray& regs, const A64Unic
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}
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TEST_CASE("A64: Single random instruction", "[a64]") {
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A64TestEnv jit_env{};
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A64TestEnv uni_env{};
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Dynarmic::A64::Jit jit{GetUserConfig(jit_env)};
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A64Unicorn uni{uni_env};
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A64Unicorn::RegisterArray regs;
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A64Unicorn::VectorArray vecs;
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std::vector<u32> instructions(1);
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@ -299,11 +293,17 @@ TEST_CASE("A64: Single random instruction", "[a64]") {
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INFO("Instruction: 0x" << std::hex << instructions[0]);
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RunTestInstance(regs, vecs, start_address, instructions, pstate, fpcr);
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RunTestInstance(jit, uni, jit_env, uni_env, regs, vecs, start_address, instructions, pstate, fpcr);
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}
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}
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TEST_CASE("A64: Floating point instructions", "[a64]") {
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A64TestEnv jit_env{};
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A64TestEnv uni_env{};
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Dynarmic::A64::Jit jit{GetUserConfig(jit_env)};
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A64Unicorn uni{uni_env};
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static constexpr std::array<u64, 80> float_numbers {
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0x00000000, // positive zero
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0x00000001, // smallest positive denormal
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@ -415,11 +415,17 @@ TEST_CASE("A64: Floating point instructions", "[a64]") {
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INFO("Instruction: 0x" << std::hex << instructions[0]);
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RunTestInstance(regs, vecs, start_address, instructions, pstate, fpcr);
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RunTestInstance(jit, uni, jit_env, uni_env, regs, vecs, start_address, instructions, pstate, fpcr);
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}
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}
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TEST_CASE("A64: Small random block", "[a64]") {
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A64TestEnv jit_env{};
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A64TestEnv uni_env{};
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Dynarmic::A64::Jit jit{GetUserConfig(jit_env)};
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A64Unicorn uni{uni_env};
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A64Unicorn::RegisterArray regs;
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A64Unicorn::VectorArray vecs;
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std::vector<u32> instructions(5);
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@ -444,6 +450,6 @@ TEST_CASE("A64: Small random block", "[a64]") {
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INFO("Instruction 4: 0x" << std::hex << instructions[3]);
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INFO("Instruction 5: 0x" << std::hex << instructions[4]);
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RunTestInstance(regs, vecs, start_address, instructions, pstate, fpcr);
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RunTestInstance(jit, uni, jit_env, uni_env, regs, vecs, start_address, instructions, pstate, fpcr);
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}
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}
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@ -26,8 +26,6 @@ add_executable(dynarmic_tests
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A32/test_thumb_instructions.cpp
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A32/testenv.h
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A64/a64.cpp
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A64/inst_gen.cpp
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A64/inst_gen.h
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A64/testenv.h
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cpu_info.cpp
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fp/FPToFixed.cpp
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@ -42,6 +40,8 @@ if (DYNARMIC_TESTS_USE_UNICORN)
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target_sources(dynarmic_tests PRIVATE
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A64/fuzz_with_unicorn.cpp
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A64/verify_unicorn.cpp
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fuzz_util.cpp
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fuzz_util.h
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unicorn_emu/a32_unicorn.cpp
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unicorn_emu/a32_unicorn.h
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unicorn_emu/a64_unicorn.cpp
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@ -4,10 +4,37 @@
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* General Public License version 2 or any later version.
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*/
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#include <cstring>
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#include <fmt/format.h>
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#include <fmt/ostream.h>
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#include "common/assert.h"
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#include "inst_gen.h"
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#include "common/fp/fpcr.h"
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#include "common/fp/rounding_mode.h"
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#include "fuzz_util.h"
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#include "rand_int.h"
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using namespace Dynarmic;
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std::ostream& operator<<(std::ostream& o, Vector vec) {
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return o << fmt::format("{:016x}'{:016x}", vec[1], vec[0]);
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}
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Vector RandomVector() {
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return {RandInt<u64>(0, ~u64(0)), RandInt<u64>(0, ~u64(0))};
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}
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u32 RandomFpcr() {
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FP::FPCR fpcr;
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fpcr.AHP(RandInt(0, 1) == 0);
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fpcr.DN(RandInt(0, 1) == 0);
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fpcr.FZ(RandInt(0, 1) == 0);
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fpcr.RMode(static_cast<FP::RoundingMode>(RandInt(0, 3)));
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fpcr.FZ16(RandInt(0, 1) == 0);
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return fpcr.Value();
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}
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InstructionGenerator::InstructionGenerator(const char* format){
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ASSERT(std::strlen(format) == 32);
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@ -30,9 +57,7 @@ InstructionGenerator::InstructionGenerator(const char* format){
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u32 InstructionGenerator::Generate() const {
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u32 inst;
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do {
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u32 random = RandInt<u32>(0, 0xFFFFFFFF);
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inst = bits | (random & ~mask);
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} while (IsInvalidInstruction(inst));
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u32 random = RandInt<u32>(0, 0xFFFFFFFF);
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inst = bits | (random & ~mask);
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return inst;
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}
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@ -4,12 +4,19 @@
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* General Public License version 2 or any later version.
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*/
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#include <algorithm>
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#include <cstring>
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#include <vector>
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#pragma once
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#include <array>
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#include <iosfwd>
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#include "common/common_types.h"
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using Vector = std::array<u64, 2>;
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std::ostream& operator<<(std::ostream& o, Vector vec);
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Vector RandomVector();
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u32 RandomFpcr();
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struct InstructionGenerator final {
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public:
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explicit InstructionGenerator(const char* format);
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@ -19,18 +26,7 @@ public:
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u32 Mask() const { return mask; }
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bool Match(u32 inst) const { return (inst & mask) == bits; }
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static void AddInvalidInstruction(const char* format) {
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invalid_instructions.emplace_back(InstructionGenerator{format});
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}
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static bool IsInvalidInstruction(u32 inst) {
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return std::any_of(invalid_instructions.begin(), invalid_instructions.end(),
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[inst](const auto& invalid) { return invalid.Match(inst); });
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}
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private:
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static inline std::vector<InstructionGenerator> invalid_instructions;
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u32 bits = 0;
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u32 mask = 0;
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};
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