Implement MUL (T1)

This commit is contained in:
MerryMage 2016-12-21 22:44:14 +00:00
parent 36082087de
commit c764a2b889
3 changed files with 16 additions and 1 deletions

View file

@ -53,7 +53,7 @@ boost::optional<const Thumb16Matcher<V>&> DecodeThumb16(u16 instruction) {
INST(&V::thumb16_CMP_reg_t1, "CMP (reg, T1)", "0100001010mmmnnn"),
INST(&V::thumb16_CMN_reg, "CMN (reg)", "0100001011mmmnnn"),
INST(&V::thumb16_ORR_reg, "ORR (reg)", "0100001100mmmddd"),
//INST(&V::thumb16_MULS_rr, "MULS (rr)", "0100001101mmmddd"),
INST(&V::thumb16_MUL_reg, "MUL (reg)", "0100001101nnnddd"),
INST(&V::thumb16_BIC_reg, "BIC (reg)", "0100001110mmmddd"),
INST(&V::thumb16_MVN_reg, "MVN (reg)", "0100001111mmmddd"),

View file

@ -120,6 +120,10 @@ public:
return fmt::format("orrs {}, {}", d_n, m);
}
std::string thumb16_MUL_reg(Reg n, Reg d_m) {
return fmt::format("muls {}, {}, {}", d_m, n, d_m);
}
std::string thumb16_BIC_reg(Reg m, Reg d_n) {
return fmt::format("bics {}, {}", d_n, m);
}

View file

@ -328,6 +328,17 @@ struct ThumbTranslatorVisitor final {
return true;
}
bool thumb16_MUL_reg(Reg n, Reg d_m) {
Reg d = d_m, m = d_m;
// MULS <Rdn>, <Rm>, <Rdn>
// Rd cannot encode R15.
auto result = ir.Mul(ir.GetRegister(m), ir.GetRegister(n));
ir.SetRegister(d, result);
ir.SetNFlag(ir.MostSignificantBit(result));
ir.SetZFlag(ir.IsZero(result));
return true;
}
bool thumb16_BIC_reg(Reg m, Reg d_n) {
Reg d = d_n, n = d_n;
// BICS <Rdn>, <Rm>