From b5f988379a266667abeba9009e2c73f3aefd51d3 Mon Sep 17 00:00:00 2001 From: Liam Date: Sun, 13 Nov 2022 18:39:33 -0500 Subject: [PATCH] Fix sets --- src/dynarmic/backend/arm64/emit_arm64_a64.cpp | 20 +++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/src/dynarmic/backend/arm64/emit_arm64_a64.cpp b/src/dynarmic/backend/arm64/emit_arm64_a64.cpp index d24f2481..71f72895 100644 --- a/src/dynarmic/backend/arm64/emit_arm64_a64.cpp +++ b/src/dynarmic/backend/arm64/emit_arm64_a64.cpp @@ -256,8 +256,8 @@ void EmitIR(oaknut::CodeGenerator& code, EmitContext& ctx, RegAlloc::Realize(Wvalue); // TODO: Detect if Gpr vs Fpr is more appropriate - - code.STR(Wvalue, Xstate, offsetof(A64JitState, reg) + sizeof(u64) * static_cast(reg)); + code.MOV(Wscratch0, Wvalue); + code.STR(Xscratch0, Xstate, offsetof(A64JitState, reg) + sizeof(u64) * static_cast(reg)); } template<> @@ -280,7 +280,13 @@ void EmitIR(oaknut::CodeGenerator& code, EmitContext& ctx, const A64::Vec vec = inst->GetArg(0).GetA64VecRef(); auto Svalue = ctx.reg_alloc.ReadS(args[1]); RegAlloc::Realize(Svalue); - code.STR(Svalue, Xstate, offsetof(A64JitState, vec) + sizeof(u64) * 2 * static_cast(vec)); + + // TODO: Optimize + auto Qvalue = Svalue->toQ().B16(); + code.FMOV(Wscratch0, Svalue); + code.EOR(Qvalue, Qvalue, Qvalue); + code.FMOV(Svalue, Wscratch0); + code.STR(Svalue->toQ(), Xstate, offsetof(A64JitState, vec) + sizeof(u64) * 2 * static_cast(vec)); } template<> @@ -289,7 +295,13 @@ void EmitIR(oaknut::CodeGenerator& code, EmitContext& ctx, const A64::Vec vec = inst->GetArg(0).GetA64VecRef(); auto Dvalue = ctx.reg_alloc.ReadD(args[1]); RegAlloc::Realize(Dvalue); - code.STR(Dvalue, Xstate, offsetof(A64JitState, vec) + sizeof(u64) * 2 * static_cast(vec)); + + // TODO: Optimize + auto Qvalue = Dvalue->toQ().B16(); + code.FMOV(Xscratch0, Dvalue); + code.EOR(Qvalue, Qvalue, Qvalue); + code.FMOV(Dvalue, Xscratch0); + code.STR(Dvalue->toQ(), Xstate, offsetof(A64JitState, vec) + sizeof(u64) * 2 * static_cast(vec)); } template<>