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Merge pull request #470 from lioncash/assert

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general: Replace unreachable-imitating assertions with UNREACHABLE()
This commit is contained in:
Merry 2019-04-12 20:14:18 +01:00 committed by MerryMage
commit b5e25959d9
6 changed files with 17 additions and 17 deletions
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8
src/backend/x64/a32_emit_x64.cpp
View file

@ -1018,7 +1018,7 @@ void A32EmitX64::EmitA32CoprocSendOneWord(A32EmitContext& ctx, IR::Inst* inst) {
return; return;
} }
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
} }
} }
@ -1060,7 +1060,7 @@ void A32EmitX64::EmitA32CoprocSendTwoWords(A32EmitContext& ctx, IR::Inst* inst)
return; return;
} }
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
} }
} }
@ -1102,7 +1102,7 @@ void A32EmitX64::EmitA32CoprocGetOneWord(A32EmitContext& ctx, IR::Inst* inst) {
return; return;
} }
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
} }
} }
@ -1147,7 +1147,7 @@ void A32EmitX64::EmitA32CoprocGetTwoWords(A32EmitContext& ctx, IR::Inst* inst) {
return; return;
} }
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
} }
} }

2
src/backend/x64/emit_x64.cpp
View file

@ -128,7 +128,7 @@ void EmitX64::EmitGetNZCVFromOp(EmitContext& ctx, IR::Inst* inst) {
case IR::Type::U64: case IR::Type::U64:
return 64; return 64;
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
return 0; return 0;
} }
}(); }();

4
src/backend/x64/oparg.h
View file

@ -26,7 +26,7 @@ struct OpArg {
case Type::Reg: case Type::Reg:
return inner_reg; return inner_reg;
} }
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
} }
void setBit(int bits) { void setBit(int bits) {
@ -56,7 +56,7 @@ struct OpArg {
return; return;
} }
} }
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
} }
private: private:

4
src/frontend/A32/translate/translate_arm.cpp
View file

@ -173,7 +173,7 @@ IR::ResultAndCarry<IR::U32> ArmTranslatorVisitor::EmitImmShift(IR::U32 value, Sh
else else
return ir.RotateRightExtended(value, carry_in); return ir.RotateRightExtended(value, carry_in);
} }
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
return {}; return {};
} }
@ -188,7 +188,7 @@ IR::ResultAndCarry<IR::U32> ArmTranslatorVisitor::EmitRegShift(IR::U32 value, Sh
case ShiftType::ROR: case ShiftType::ROR:
return ir.RotateRight(value, amount, carry_in); return ir.RotateRight(value, amount, carry_in);
} }
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
return {}; return {};
} }

4
src/frontend/A64/translate/impl/impl.cpp
View file

@ -369,7 +369,7 @@ IR::U32U64 TranslatorVisitor::ShiftReg(size_t bitsize, Reg reg, Imm<2> shift, IR
case 0b11: case 0b11:
return ir.RotateRight(result, amount); return ir.RotateRight(result, amount);
} }
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
return {}; return {};
} }
@ -433,7 +433,7 @@ IR::U32U64 TranslatorVisitor::ExtendReg(size_t bitsize, Reg reg, Imm<3> option,
break; break;
} }
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
} }
if (len < bitsize) { if (len < bitsize) {

12
src/frontend/ir/ir_emitter.cpp
View file

@ -330,7 +330,7 @@ U64 IREmitter::SignExtendToLong(const UAny& a) {
case Type::U64: case Type::U64:
return U64(a); return U64(a);
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
return {}; return {};
} }
} }
@ -346,7 +346,7 @@ U32 IREmitter::SignExtendToWord(const UAny& a) {
case Type::U64: case Type::U64:
return Inst<U32>(Opcode::LeastSignificantWord, a); return Inst<U32>(Opcode::LeastSignificantWord, a);
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
return {}; return {};
} }
} }
@ -374,7 +374,7 @@ U64 IREmitter::ZeroExtendToLong(const UAny& a) {
case Type::U64: case Type::U64:
return U64(a); return U64(a);
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
return {}; return {};
} }
} }
@ -390,7 +390,7 @@ U32 IREmitter::ZeroExtendToWord(const UAny& a) {
case Type::U64: case Type::U64:
return Inst<U32>(Opcode::LeastSignificantWord, a); return Inst<U32>(Opcode::LeastSignificantWord, a);
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
return {}; return {};
} }
} }
@ -817,7 +817,7 @@ UAny IREmitter::VectorGetElement(size_t esize, const U128& a, size_t index) {
case 64: case 64:
return Inst<U64>(Opcode::VectorGetElement64, a, Imm8(static_cast<u8>(index))); return Inst<U64>(Opcode::VectorGetElement64, a, Imm8(static_cast<u8>(index)));
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
return {}; return {};
} }
} }
@ -834,7 +834,7 @@ U128 IREmitter::VectorSetElement(size_t esize, const U128& a, size_t index, cons
case 64: case 64:
return Inst<U128>(Opcode::VectorSetElement64, a, Imm8(static_cast<u8>(index)), elem); return Inst<U128>(Opcode::VectorSetElement64, a, Imm8(static_cast<u8>(index)), elem);
default: default:
ASSERT_MSG(false, "Unreachable"); UNREACHABLE();
return {}; return {};
} }
} }