From b4c586d5ef3894a807a1a7d2676b3feaacda42fb Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Wed, 10 Aug 2016 16:43:37 +0100
Subject: [PATCH] TranslateArm: VSTR: Correct behaviour in big-endian mode

---
 src/frontend/translate/translate_arm/vfp2.cpp |  7 +++++--
 tests/arm/fuzz_arm.cpp                        | 11 ++++++-----
 2 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/src/frontend/translate/translate_arm/vfp2.cpp b/src/frontend/translate/translate_arm/vfp2.cpp
index 128aa45b..251202ca 100644
--- a/src/frontend/translate/translate_arm/vfp2.cpp
+++ b/src/frontend/translate/translate_arm/vfp2.cpp
@@ -388,8 +388,11 @@ bool ArmTranslatorVisitor::vfp2_VSTR(Cond cond, bool U, bool D, Reg n, size_t Vd
         auto address = U ? ir.Add(base, ir.Imm32(imm32)) : ir.Sub(base, ir.Imm32(imm32));
         if (sz) {
             auto d_u64 = ir.TransferFromFP64(ir.GetExtendedRegister(d));
-            ir.WriteMemory32(address, ir.LeastSignificantWord(d_u64));
-            ir.WriteMemory32(ir.Add(address, ir.Imm32(4)), ir.MostSignificantWord(d_u64).result);
+            auto lo = ir.LeastSignificantWord(d_u64);
+            auto hi = ir.MostSignificantWord(d_u64).result;
+            if (ir.current_location.EFlag()) std::swap(lo, hi);
+            ir.WriteMemory32(address, lo);
+            ir.WriteMemory32(ir.Add(address, ir.Imm32(4)), hi);
         } else {
             ir.WriteMemory32(address, ir.TransferFromFP32(ir.GetExtendedRegister(d)));
         }
diff --git a/tests/arm/fuzz_arm.cpp b/tests/arm/fuzz_arm.cpp
index 3a143bd8..3aa49e53 100644
--- a/tests/arm/fuzz_arm.cpp
+++ b/tests/arm/fuzz_arm.cpp
@@ -424,13 +424,14 @@ TEST_CASE("VFP: VMOV", "[JitX64][vfp]") {
 
 
 TEST_CASE("VFP: VMOV (reg), VLDR, VSTR", "[JitX64][vfp]") {
-    const std::array<InstructionGenerator, 3> instructions = {{
-        InstructionGenerator("cccc11101D110000dddd101z01M0mmmm"),
-        InstructionGenerator("cccc1101UD01nnnndddd101zvvvvvvvv"),
-        InstructionGenerator("cccc1101UD00nnnndddd101zvvvvvvvv"),
+    const std::array<InstructionGenerator, 4> instructions = {{
+        InstructionGenerator("1111000100000001000000e000000000"), // SETEND
+        InstructionGenerator("cccc11101D110000dddd101z01M0mmmm"), // VMOV (reg)
+        InstructionGenerator("cccc1101UD01nnnndddd101zvvvvvvvv"), // VLDR
+        InstructionGenerator("cccc1101UD00nnnndddd101zvvvvvvvv"), // VSTR
     }};
 
-    FuzzJitArm(1, 1, 10000, [&instructions]() -> u32 {
+    FuzzJitArm(5, 6, 10000, [&instructions]() -> u32 {
         return instructions[RandInt<size_t>(0, instructions.size() - 1)].Generate();
     });
 }