diff --git a/src/backend_x64/emit_x64_data_processing.cpp b/src/backend_x64/emit_x64_data_processing.cpp index d0252206..0bb7c0b9 100644 --- a/src/backend_x64/emit_x64_data_processing.cpp +++ b/src/backend_x64/emit_x64_data_processing.cpp @@ -1196,8 +1196,10 @@ void EmitX64::EmitZeroExtendWordToLong(EmitContext& ctx, IR::Inst* inst) { void EmitX64::EmitZeroExtendLongToQuad(EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); if (args[0].IsInGpr()) { - // We let the register allocator automatically zero extend this when necessary - ctx.reg_alloc.DefineValue(inst, args[0]); + Xbyak::Reg64 source = ctx.reg_alloc.UseGpr(args[0]); + Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm(); + code->movq(result, source); + ctx.reg_alloc.DefineValue(inst, result); } else { Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]); code->movq(result, result); diff --git a/src/backend_x64/reg_alloc.cpp b/src/backend_x64/reg_alloc.cpp index 4b0f7861..e3ea115e 100644 --- a/src/backend_x64/reg_alloc.cpp +++ b/src/backend_x64/reg_alloc.cpp @@ -558,19 +558,22 @@ void RegAlloc::EmitMove(HostLoc to, HostLoc from) { if (HostLocIsXMM(to) && HostLocIsXMM(from)) { code->movaps(HostLocToXmm(to), HostLocToXmm(from)); } else if (HostLocIsGPR(to) && HostLocIsGPR(from)) { - if (bit_width >= 64) { + ASSERT(bit_width != 128); + if (bit_width == 64) { code->mov(HostLocToReg64(to), HostLocToReg64(from)); } else { code->mov(HostLocToReg64(to).cvt32(), HostLocToReg64(from).cvt32()); } } else if (HostLocIsXMM(to) && HostLocIsGPR(from)) { - if (bit_width >= 64) { + ASSERT(bit_width != 128); + if (bit_width == 64) { code->movq(HostLocToXmm(to), HostLocToReg64(from)); } else { code->movd(HostLocToXmm(to), HostLocToReg64(from).cvt32()); } } else if (HostLocIsGPR(to) && HostLocIsXMM(from)) { - if (bit_width >= 64) { + ASSERT(bit_width != 128); + if (bit_width == 64) { code->movq(HostLocToReg64(to), HostLocToXmm(from)); } else { code->movd(HostLocToReg64(to).cvt32(), HostLocToXmm(from));