Add a64 memory
This commit is contained in:
Liam
parent
4ebc32e1e4
commit
a8cb2c33f6
1 changed files with 86 additions and 86 deletions
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@ -5,11 +5,12 @@
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#include <oaknut/oaknut.hpp>
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#include "dynarmic/backend/arm64/a32_jitstate.h"
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#include "dynarmic/backend/arm64/a64_jitstate.h"
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#include "dynarmic/backend/arm64/abi.h"
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#include "dynarmic/backend/arm64/emit_arm64.h"
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#include "dynarmic/backend/arm64/emit_context.h"
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#include "dynarmic/backend/arm64/reg_alloc.h"
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#include "dynarmic/ir/acc_type.h"
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#include "dynarmic/ir/basic_block.h"
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#include "dynarmic/ir/microinstruction.h"
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#include "dynarmic/ir/opcodes.h"
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@ -18,172 +19,171 @@ namespace Dynarmic::Backend::Arm64 {
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using namespace oaknut::util;
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static bool IsOrdered(IR::AccType acctype) {
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return acctype == IR::AccType::ORDERED || acctype == IR::AccType::ORDEREDRW || acctype == IR::AccType::LIMITEDORDERED;
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}
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static void EmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, LinkTarget fn) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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ctx.reg_alloc.PrepareForCall(inst, {}, args[1]);
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const bool ordered = IsOrdered(args[2].GetImmediateAccType());
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EmitRelocation(code, ctx, fn);
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if (ordered) {
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code.DMB(oaknut::BarrierOp::ISH);
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}
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}
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static void EmitExclusiveReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, LinkTarget fn) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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ctx.reg_alloc.PrepareForCall(inst, {}, args[1]);
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const bool ordered = IsOrdered(args[2].GetImmediateAccType());
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code.MOV(Wscratch0, 1);
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code.STRB(Wscratch0, Xstate, offsetof(A64JitState, exclusive_state));
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EmitRelocation(code, ctx, fn);
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if (ordered) {
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code.DMB(oaknut::BarrierOp::ISH);
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}
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}
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static void EmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, LinkTarget fn) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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ctx.reg_alloc.PrepareForCall(inst, {}, args[1], args[2]);
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const bool ordered = IsOrdered(args[3].GetImmediateAccType());
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if (ordered) {
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code.DMB(oaknut::BarrierOp::ISH);
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}
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EmitRelocation(code, ctx, fn);
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if (ordered) {
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code.DMB(oaknut::BarrierOp::ISH);
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}
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}
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static void EmitExclusiveWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, LinkTarget fn) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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ctx.reg_alloc.PrepareForCall(inst, {}, args[1], args[2]);
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const bool ordered = IsOrdered(args[3].GetImmediateAccType());
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oaknut::Label end;
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if (ordered) {
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code.DMB(oaknut::BarrierOp::ISH);
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}
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code.LDRB(Wscratch0, Xstate, offsetof(A64JitState, exclusive_state));
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code.CBZ(Wscratch0, end);
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code.STRB(WZR, Xstate, offsetof(A64JitState, exclusive_state));
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EmitRelocation(code, ctx, fn);
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if (ordered) {
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code.DMB(oaknut::BarrierOp::ISH);
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}
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code.l(end);
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}
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template<>
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void EmitIR<IR::Opcode::A64ClearExclusive>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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void EmitIR<IR::Opcode::A64ClearExclusive>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst*) {
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code.STR(WZR, Xstate, offsetof(A64JitState, exclusive_state));
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}
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template<>
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void EmitIR<IR::Opcode::A64ReadMemory8>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitReadMemory(code, ctx, inst, LinkTarget::ReadMemory8);
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}
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template<>
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void EmitIR<IR::Opcode::A64ReadMemory16>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitReadMemory(code, ctx, inst, LinkTarget::ReadMemory16);
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}
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template<>
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void EmitIR<IR::Opcode::A64ReadMemory32>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitReadMemory(code, ctx, inst, LinkTarget::ReadMemory32);
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}
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template<>
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void EmitIR<IR::Opcode::A64ReadMemory64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitReadMemory(code, ctx, inst, LinkTarget::ReadMemory64);
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}
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template<>
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void EmitIR<IR::Opcode::A64ReadMemory128>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitReadMemory(code, ctx, inst, LinkTarget::ReadMemory128);
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}
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template<>
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void EmitIR<IR::Opcode::A64ExclusiveReadMemory8>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitExclusiveReadMemory(code, ctx, inst, LinkTarget::ExclusiveReadMemory8);
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}
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template<>
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void EmitIR<IR::Opcode::A64ExclusiveReadMemory16>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitExclusiveReadMemory(code, ctx, inst, LinkTarget::ExclusiveReadMemory16);
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}
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template<>
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void EmitIR<IR::Opcode::A64ExclusiveReadMemory32>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitExclusiveReadMemory(code, ctx, inst, LinkTarget::ExclusiveReadMemory32);
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}
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template<>
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void EmitIR<IR::Opcode::A64ExclusiveReadMemory64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitExclusiveReadMemory(code, ctx, inst, LinkTarget::ExclusiveReadMemory64);
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}
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template<>
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void EmitIR<IR::Opcode::A64ExclusiveReadMemory128>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitExclusiveReadMemory(code, ctx, inst, LinkTarget::ExclusiveReadMemory128);
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}
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template<>
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void EmitIR<IR::Opcode::A64WriteMemory8>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitWriteMemory(code, ctx, inst, LinkTarget::WriteMemory8);
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}
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template<>
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void EmitIR<IR::Opcode::A64WriteMemory16>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitWriteMemory(code, ctx, inst, LinkTarget::WriteMemory16);
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}
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template<>
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void EmitIR<IR::Opcode::A64WriteMemory32>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitWriteMemory(code, ctx, inst, LinkTarget::WriteMemory32);
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}
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template<>
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void EmitIR<IR::Opcode::A64WriteMemory64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitWriteMemory(code, ctx, inst, LinkTarget::WriteMemory64);
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}
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template<>
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void EmitIR<IR::Opcode::A64WriteMemory128>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitWriteMemory(code, ctx, inst, LinkTarget::WriteMemory128);
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}
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template<>
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void EmitIR<IR::Opcode::A64ExclusiveWriteMemory8>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitExclusiveWriteMemory(code, ctx, inst, LinkTarget::ExclusiveWriteMemory8);
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}
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template<>
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void EmitIR<IR::Opcode::A64ExclusiveWriteMemory16>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitExclusiveWriteMemory(code, ctx, inst, LinkTarget::ExclusiveWriteMemory16);
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}
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template<>
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void EmitIR<IR::Opcode::A64ExclusiveWriteMemory32>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitExclusiveWriteMemory(code, ctx, inst, LinkTarget::ExclusiveWriteMemory32);
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}
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template<>
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void EmitIR<IR::Opcode::A64ExclusiveWriteMemory64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitExclusiveWriteMemory(code, ctx, inst, LinkTarget::ExclusiveWriteMemory64);
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}
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template<>
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void EmitIR<IR::Opcode::A64ExclusiveWriteMemory128>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
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(void)code;
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(void)ctx;
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(void)inst;
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ASSERT_FALSE("Unimplemented");
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EmitExclusiveWriteMemory(code, ctx, inst, LinkTarget::ExclusiveWriteMemory128);
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}
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} // namespace Dynarmic::Backend::Arm64
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