data_processsing_conditional_select: Implement CSINC, CSINV and CSNEG
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b08be71775
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2 changed files with 39 additions and 3 deletions
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@ -332,9 +332,9 @@ INST(SBCS, "SBCS", "z1111
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// Data Processing - Register - Conditional select
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INST(CSEL, "CSEL", "z0011010100mmmmmcccc00nnnnnddddd")
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//INST(CSINC, "CSINC", "z0011010100mmmmmcccc01nnnnnddddd")
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//INST(CSINV, "CSINV", "z1011010100mmmmmcccc00nnnnnddddd")
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//INST(CSNEG, "CSNEG", "z1011010100mmmmmcccc01nnnnnddddd")
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INST(CSINC, "CSINC", "z0011010100mmmmmcccc01nnnnnddddd")
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INST(CSINV, "CSINV", "z1011010100mmmmmcccc00nnnnnddddd")
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INST(CSNEG, "CSNEG", "z1011010100mmmmmcccc01nnnnnddddd")
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// Data Processing - Register - 3 source
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//INST(MADD, "MADD", "z0011011000mmmmm0aaaaannnnnddddd")
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@ -22,5 +22,41 @@ bool TranslatorVisitor::CSEL(bool sf, Reg Rm, Cond cond, Reg Rn, Reg Rd) {
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return true;
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}
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bool TranslatorVisitor::CSINC(bool sf, Reg Rm, Cond cond, Reg Rn, Reg Rd) {
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const size_t datasize = sf ? 64 : 32;
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const IR::U32U64 operand1 = X(datasize, Rn);
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const IR::U32U64 operand2 = X(datasize, Rm);
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const IR::U32U64 result = ir.ConditionalSelect(cond, operand1, ir.Add(operand2, I(datasize, 1)));
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::CSINV(bool sf, Reg Rm, Cond cond, Reg Rn, Reg Rd) {
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const size_t datasize = sf ? 64 : 32;
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const IR::U32U64 operand1 = X(datasize, Rn);
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const IR::U32U64 operand2 = X(datasize, Rm);
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const IR::U32U64 result = ir.ConditionalSelect(cond, operand1, ir.Not(operand2));
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::CSNEG(bool sf, Reg Rm, Cond cond, Reg Rn, Reg Rd) {
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const size_t datasize = sf ? 64 : 32;
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const IR::U32U64 operand1 = X(datasize, Rn);
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const IR::U32U64 operand2 = X(datasize, Rm);
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const IR::U32U64 result = ir.ConditionalSelect(cond, operand1, ir.Add(ir.Not(operand2), I(datasize, 1)));
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X(datasize, Rd, result);
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return true;
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}
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} // namespace A64
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} // namespace Dynarmic
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