From a33d186fea7adb32bec5a5bdba596917c60efd0b Mon Sep 17 00:00:00 2001
From: Merry <git@mary.rs>
Date: Fri, 22 Jul 2022 23:59:31 +0100
Subject: [PATCH] backend/arm64: Implement LeastSignificantHalf

---
 .../backend/arm64/emit_arm64_data_processing.cpp      | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp b/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
index 2b221d46..e51c0d66 100644
--- a/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
+++ b/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
@@ -84,10 +84,13 @@ void EmitIR<IR::Opcode::LeastSignificantWord>(oaknut::CodeGenerator& code, EmitC
 
 template<>
 void EmitIR<IR::Opcode::LeastSignificantHalf>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
-    (void)code;
-    (void)ctx;
-    (void)inst;
-    ASSERT_FALSE("Unimplemented");
+    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
+
+    auto Wresult = ctx.reg_alloc.WriteW(inst);
+    auto Woperand = ctx.reg_alloc.ReadW(args[0]);
+    RegAlloc::Realize(Wresult, Woperand);
+
+    code.UXTH(Wresult, Woperand);  // TODO: Zext elimination
 }
 
 template<>