A32: Implement the ARM-mode variant of SEVL
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e89ca42048
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6 changed files with 12 additions and 1 deletions
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@ -26,6 +26,8 @@ enum class Exception {
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UnpredictableInstruction,
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UnpredictableInstruction,
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/// A SEV instruction was executed. The event register of all PEs should be set.
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/// A SEV instruction was executed. The event register of all PEs should be set.
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SendEvent,
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SendEvent,
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/// A SEVL instruction was executed. The event register of the current PE should be set.
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SendEventLocal,
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/// A WFI instruction was executed. You may now enter a low-power state.
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/// A WFI instruction was executed. You may now enter a low-power state.
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WaitForInterrupt,
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WaitForInterrupt,
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/// A WFE instruction was executed. You may now enter a low-power state if the event register is clear.
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/// A WFE instruction was executed. You may now enter a low-power state if the event register is clear.
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@ -34,7 +34,7 @@ enum class Exception {
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WaitForEvent,
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WaitForEvent,
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/// A SEV instruction was executed. The event register of all PEs should be set.
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/// A SEV instruction was executed. The event register of all PEs should be set.
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SendEvent,
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SendEvent,
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/// A SEV instruction was executed. The event register of the current PE should be set.
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/// A SEVL instruction was executed. The event register of the current PE should be set.
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SendEventLocal,
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SendEventLocal,
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/// A YIELD instruction was executed.
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/// A YIELD instruction was executed.
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Yield,
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Yield,
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@ -97,6 +97,7 @@ INST(arm_UXTAH, "UXTAH", "cccc01101111nnnnddddrr000111mmmm
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INST(arm_PLD_imm, "PLD (imm)", "11110101uz01nnnn1111iiiiiiiiiiii") // v5E for PLD; v7 for PLDW
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INST(arm_PLD_imm, "PLD (imm)", "11110101uz01nnnn1111iiiiiiiiiiii") // v5E for PLD; v7 for PLDW
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INST(arm_PLD_reg, "PLD (reg)", "11110111uz01nnnn1111iiiiitt0mmmm") // v5E for PLD; v7 for PLDW
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INST(arm_PLD_reg, "PLD (reg)", "11110111uz01nnnn1111iiiiitt0mmmm") // v5E for PLD; v7 for PLDW
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INST(arm_SEV, "SEV", "----0011001000001111000000000100") // v6K
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INST(arm_SEV, "SEV", "----0011001000001111000000000100") // v6K
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INST(arm_SEVL, "SEVL", "----0011001000001111000000000101") // v8
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INST(arm_WFE, "WFE", "----0011001000001111000000000010") // v6K
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INST(arm_WFE, "WFE", "----0011001000001111000000000010") // v6K
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INST(arm_WFI, "WFI", "----0011001000001111000000000011") // v6K
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INST(arm_WFI, "WFI", "----0011001000001111000000000011") // v6K
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INST(arm_YIELD, "YIELD", "----0011001000001111000000000001") // v6K
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INST(arm_YIELD, "YIELD", "----0011001000001111000000000001") // v6K
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@ -451,6 +451,9 @@ public:
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std::string arm_SEV() {
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std::string arm_SEV() {
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return "sev";
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return "sev";
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}
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}
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std::string arm_SEVL() {
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return "sevl";
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}
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std::string arm_WFE() {
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std::string arm_WFE() {
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return "wfe";
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return "wfe";
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}
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}
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@ -33,6 +33,10 @@ bool ArmTranslatorVisitor::arm_SEV() {
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return RaiseException(Exception::SendEvent);
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return RaiseException(Exception::SendEvent);
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}
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}
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bool ArmTranslatorVisitor::arm_SEVL() {
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return RaiseException(Exception::SendEventLocal);
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}
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bool ArmTranslatorVisitor::arm_WFE() {
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bool ArmTranslatorVisitor::arm_WFE() {
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return RaiseException(Exception::WaitForEvent);
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return RaiseException(Exception::WaitForEvent);
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}
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}
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@ -167,6 +167,7 @@ struct ArmTranslatorVisitor final {
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bool arm_PLD_imm(bool add, bool R, Reg n, Imm<12> imm12);
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bool arm_PLD_imm(bool add, bool R, Reg n, Imm<12> imm12);
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bool arm_PLD_reg(bool add, bool R, Reg n, Imm<5> imm5, ShiftType shift, Reg m);
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bool arm_PLD_reg(bool add, bool R, Reg n, Imm<5> imm5, ShiftType shift, Reg m);
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bool arm_SEV();
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bool arm_SEV();
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bool arm_SEVL();
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bool arm_WFE();
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bool arm_WFE();
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bool arm_WFI();
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bool arm_WFI();
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bool arm_YIELD();
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bool arm_YIELD();
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