diff --git a/src/backend_x64/block_of_code.cpp b/src/backend_x64/block_of_code.cpp
index 78b66129..adf3de7e 100644
--- a/src/backend_x64/block_of_code.cpp
+++ b/src/backend_x64/block_of_code.cpp
@@ -44,7 +44,6 @@ void BlockOfCode::ReturnFromRunCode(bool MXCSR_switch) {
     if (MXCSR_switch)
         SwitchMxcsrOnExit();
 
-    MOV(64, R(RSP), MDisp(R15, offsetof(JitState, save_host_RSP)));
     ABI_PopRegistersAndAdjustStack(ABI_ALL_CALLEE_SAVED, 8);
     RET();
 }
@@ -77,7 +76,6 @@ void BlockOfCode::GenRunCode() {
     ABI_PushRegistersAndAdjustStack(ABI_ALL_CALLEE_SAVED, 8);
 
     MOV(64, R(R15), R(ABI_PARAM1));
-    MOV(64, MDisp(R15, offsetof(JitState, save_host_RSP)), R(RSP));
     SwitchMxcsrOnEntry();
     JMPptr(R(ABI_PARAM2));
 }
diff --git a/src/backend_x64/emit_x64.cpp b/src/backend_x64/emit_x64.cpp
index 507f23f0..5b1c20d7 100644
--- a/src/backend_x64/emit_x64.cpp
+++ b/src/backend_x64/emit_x64.cpp
@@ -1511,7 +1511,6 @@ void EmitX64::EmitTerminalInterpret(IR::Term::Interpret terminal, Arm::LocationD
     code->MOV(64, R(ABI_PARAM1), Imm64(terminal.next.PC()));
     code->MOV(64, R(ABI_PARAM2), Imm64(reinterpret_cast<u64>(jit_interface)));
     code->MOV(32, MJitStateReg(Arm::Reg::PC), R(ABI_PARAM1));
-    code->MOV(64, R(RSP), MDisp(R15, offsetof(JitState, save_host_RSP)));
     code->SwitchMxcsrOnExit();
     code->ABI_CallFunction(reinterpret_cast<void*>(cb.InterpreterFallback));
     code->ReturnFromRunCode(false); // TODO: Check cycles
diff --git a/src/backend_x64/jitstate.h b/src/backend_x64/jitstate.h
index fdb3e6cb..0a11981c 100644
--- a/src/backend_x64/jitstate.h
+++ b/src/backend_x64/jitstate.h
@@ -27,7 +27,6 @@ struct JitState {
     // For internal use (See: BlockOfCode::RunCode)
     u32 guest_MXCSR = 0x00001f80;
     u32 save_host_MXCSR = 0;
-    u64 save_host_RSP = 0;
     s64 cycles_remaining = 0;
 
     u32 FPSCR_IDC = 0;
diff --git a/src/backend_x64/reg_alloc.cpp b/src/backend_x64/reg_alloc.cpp
index cc2a59d8..83ab32c4 100644
--- a/src/backend_x64/reg_alloc.cpp
+++ b/src/backend_x64/reg_alloc.cpp
@@ -32,6 +32,7 @@ static Gen::OpArg ImmediateToOpArg(const IR::Value& imm) {
 
 static Gen::X64Reg HostLocToX64(HostLoc loc) {
     DEBUG_ASSERT(HostLocIsRegister(loc));
+    DEBUG_ASSERT(loc != HostLoc::RSP);
     // HostLoc is ordered such that the numbers line up.
     if (HostLocIsGPR(loc)) {
         return static_cast<Gen::X64Reg>(loc);
@@ -318,9 +319,6 @@ void RegAlloc::HostCall(IR::Inst* result_def, IR::Value arg0_use, IR::Value arg1
     for (auto xmm : any_xmm) {
         ScratchRegister({xmm});
     }
-
-    ScratchRegister({HostLoc::RSP});
-    code->MOV(64, Gen::R(Gen::RSP), Gen::MDisp(Gen::R15, offsetof(JitState, save_host_RSP)));
 }
 
 HostLoc RegAlloc::SelectARegister(HostLocList desired_locations) const {
diff --git a/src/backend_x64/reg_alloc.h b/src/backend_x64/reg_alloc.h
index 2b4ba8b1..e3cb837c 100644
--- a/src/backend_x64/reg_alloc.h
+++ b/src/backend_x64/reg_alloc.h
@@ -67,7 +67,6 @@ const HostLocList any_gpr = {
     HostLoc::RSI,
     HostLoc::RDI,
     HostLoc::RBP,
-    HostLoc::RSP,
     HostLoc::R8,
     HostLoc::R9,
     HostLoc::R10,