From 9736e2cce23c48554166bdcc17383ec4b9dae3d7 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 11 May 2018 11:09:25 -0400 Subject: [PATCH] A64: Implement FABS' half-precision variant --- src/frontend/A64/decoder/a64.inc | 2 +- .../A64/translate/impl/simd_two_register_misc.cpp | 11 +++++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index f1c6663c..a67cd339 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -600,7 +600,7 @@ INST(SCVTF_int_4, "SCVTF (vector, integer)", "0Q001 //INST(FCMEQ_zero_4, "FCMEQ (zero)", "0Q0011101z100000110110nnnnnddddd") //INST(FCMLT_3, "FCMLT (zero)", "0Q00111011111000111010nnnnnddddd") //INST(FCMLT_4, "FCMLT (zero)", "0Q0011101z100000111010nnnnnddddd") -//INST(FABS_1, "FABS (vector)", "0Q00111011111000111110nnnnnddddd") +INST(FABS_1, "FABS (vector)", "0Q00111011111000111110nnnnnddddd") INST(FABS_2, "FABS (vector)", "0Q0011101z100000111110nnnnnddddd") //INST(FRINTP_1, "FRINTP (vector)", "0Q00111011111001100010nnnnnddddd") //INST(FRINTP_2, "FRINTP (vector)", "0Q0011101z100001100010nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/simd_two_register_misc.cpp b/src/frontend/A64/translate/impl/simd_two_register_misc.cpp index 5ae936cc..8668332a 100644 --- a/src/frontend/A64/translate/impl/simd_two_register_misc.cpp +++ b/src/frontend/A64/translate/impl/simd_two_register_misc.cpp @@ -114,6 +114,17 @@ bool TranslatorVisitor::XTN(bool Q, Imm<2> size, Vec Vn, Vec Vd) { return true; } +bool TranslatorVisitor::FABS_1(bool Q, Vec Vn, Vec Vd) { + const size_t datasize = Q ? 128 : 64; + + const IR::U128 operand = V(datasize, Vn); + const IR::U128 mask = ir.VectorBroadcast(64, I(64, 0x7FFF7FFF7FFF7FFF)); + const IR::U128 result = ir.VectorAnd(operand, mask); + + V(datasize, Vd, result); + return true; +} + bool TranslatorVisitor::FABS_2(bool Q, bool sz, Vec Vn, Vec Vd) { if (sz && !Q) { return ReservedValue();