diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc
index 62e3c8ca..a37012b7 100644
--- a/src/frontend/A64/decoder/a64.inc
+++ b/src/frontend/A64/decoder/a64.inc
@@ -573,9 +573,9 @@ INST(INS_elt,                "INS (element)",                             "01101
 INST(CNT,                    "CNT",                                       "0Q001110zz100000010110nnnnnddddd")
 //INST(SADALP,                 "SADALP",                                    "0Q001110zz100000011010nnnnnddddd")
 //INST(SQABS_2,                "SQABS",                                     "0Q001110zz100000011110nnnnnddddd")
-//INST(CMGT_zero_2,            "CMGT (zero)",                               "0Q001110zz100000100010nnnnnddddd")
-//INST(CMEQ_zero_2,            "CMEQ (zero)",                               "0Q001110zz100000100110nnnnnddddd")
-//INST(CMLT_2,                 "CMLT (zero)",                               "0Q001110zz100000101010nnnnnddddd")
+INST(CMGT_zero_2,            "CMGT (zero)",                               "0Q001110zz100000100010nnnnnddddd")
+INST(CMEQ_zero_2,            "CMEQ (zero)",                               "0Q001110zz100000100110nnnnnddddd")
+INST(CMLT_2,                 "CMLT (zero)",                               "0Q001110zz100000101010nnnnnddddd")
 //INST(ABS_2,                  "ABS",                                       "0Q001110zz100000101110nnnnnddddd")
 INST(XTN,                    "XTN, XTN2",                                 "0Q001110zz100001001010nnnnnddddd")
 //INST(SQXTN_2,                "SQXTN, SQXTN2",                             "0Q001110zz100001010010nnnnnddddd")
diff --git a/src/frontend/A64/translate/impl/simd_two_register_misc.cpp b/src/frontend/A64/translate/impl/simd_two_register_misc.cpp
index 160c39bb..f387145a 100644
--- a/src/frontend/A64/translate/impl/simd_two_register_misc.cpp
+++ b/src/frontend/A64/translate/impl/simd_two_register_misc.cpp
@@ -21,6 +21,51 @@ bool TranslatorVisitor::CNT(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
     return true;
 }
 
+bool TranslatorVisitor::CMGT_zero_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
+    if (size == 0b11 && !Q) {
+        return ReservedValue();
+    }
+    const size_t esize = 8 << size.ZeroExtend<size_t>();
+    const size_t datasize = Q ? 128 : 64;
+
+    const IR::U128 operand = V(datasize, Vn);
+    const IR::U128 zero = ir.ZeroExtendToQuad(ir.Imm64(0)); // TODO: Optimize
+    const IR::U128 result = ir.VectorGreaterSigned(esize, operand, zero);
+    V(datasize, Vd, result);
+    return true;
+}
+
+bool TranslatorVisitor::CMEQ_zero_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
+    if (size == 0b11 && !Q) {
+        return ReservedValue();
+    }
+    const size_t esize = 8 << size.ZeroExtend<size_t>();
+    const size_t datasize = Q ? 128 : 64;
+
+    const IR::U128 operand = V(datasize, Vn);
+    const IR::U128 zero = ir.ZeroExtendToQuad(ir.Imm64(0)); // TODO: Optimize
+    IR::U128 result = ir.VectorEqual(esize, operand, zero);
+    if (datasize == 64) {
+        result = ir.VectorZeroUpper(result);
+    }
+    V(datasize, Vd, result);
+    return true;
+}
+
+bool TranslatorVisitor::CMLT_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
+    if (size == 0b11 && !Q) {
+        return ReservedValue();
+    }
+    const size_t esize = 8 << size.ZeroExtend<size_t>();
+    const size_t datasize = Q ? 128 : 64;
+
+    const IR::U128 operand = V(datasize, Vn);
+    const IR::U128 zero = ir.ZeroExtendToQuad(ir.Imm64(0)); // TODO: Optimize
+    const IR::U128 result = ir.VectorLessSigned(esize, operand, zero);
+    V(datasize, Vd, result);
+    return true;
+}
+
 bool TranslatorVisitor::XTN(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
     if (size == 0b11) {
         return ReservedValue();