diff --git a/src/backend_x64/reg_alloc.cpp b/src/backend_x64/reg_alloc.cpp
index 9671db28..c38e77fd 100644
--- a/src/backend_x64/reg_alloc.cpp
+++ b/src/backend_x64/reg_alloc.cpp
@@ -33,7 +33,14 @@ static Gen::OpArg ImmediateToOpArg(const IR::Value& imm) {
 static Gen::X64Reg HostLocToX64(HostLoc loc) {
     DEBUG_ASSERT(HostLocIsRegister(loc));
     // HostLoc is ordered such that the numbers line up.
-    return static_cast<Gen::X64Reg>(loc);
+    if (HostLocIsGPR(loc)) {
+        return static_cast<Gen::X64Reg>(loc);
+    }
+    if (HostLocIsXMM(loc)) {
+        return static_cast<Gen::X64Reg>(size_t(loc) - size_t(HostLoc::XMM0));
+    }
+    ASSERT_MSG(false, "This should never happen.");
+    return Gen::INVALID_REG;
 }
 
 static Gen::OpArg SpillToOpArg(HostLoc loc) {