diff --git a/src/frontend/A32/decoder/thumb32.inc b/src/frontend/A32/decoder/thumb32.inc index 1840f993..4cf49efe 100644 --- a/src/frontend/A32/decoder/thumb32.inc +++ b/src/frontend/A32/decoder/thumb32.inc @@ -271,7 +271,7 @@ INST(thumb32_SMLAD, "SMLAD", "111110110010nnnnaaaadd //INST(thumb32_SMULWY, "SMULWY", "111110110011----1111----000-----") //INST(thumb32_SMLAWY, "SMLAWY", "111110110011------------000-----") INST(thumb32_SMUSD, "SMUSD", "111110110100nnnn1111dddd000Mmmmm") -//INST(thumb32_SMLSD, "SMLSD", "111110110100------------000-----") +INST(thumb32_SMLSD, "SMLSD", "111110110100nnnnaaaadddd000Xmmmm") INST(thumb32_SMMUL, "SMMUL", "111110110101nnnn1111dddd000Rmmmm") INST(thumb32_SMMLA, "SMMLA", "111110110101nnnnaaaadddd000Rmmmm") INST(thumb32_SMMLS, "SMMLS", "111110110110nnnnaaaadddd000Rmmmm") diff --git a/src/frontend/A32/translate/impl/thumb32_multiply.cpp b/src/frontend/A32/translate/impl/thumb32_multiply.cpp index 8fbbac2c..46c36a0f 100644 --- a/src/frontend/A32/translate/impl/thumb32_multiply.cpp +++ b/src/frontend/A32/translate/impl/thumb32_multiply.cpp @@ -77,6 +77,33 @@ bool ThumbTranslatorVisitor::thumb32_SMLAD(Reg n, Reg a, Reg d, bool X, Reg m) { return true; } +bool ThumbTranslatorVisitor::thumb32_SMLSD(Reg n, Reg a, Reg d, bool X, Reg m) { + if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) { + return UnpredictableInstruction(); + } + + const IR::U32 n32 = ir.GetRegister(n); + const IR::U32 m32 = ir.GetRegister(m); + const IR::U32 n_lo = ir.SignExtendHalfToWord(ir.LeastSignificantHalf(n32)); + const IR::U32 n_hi = ir.ArithmeticShiftRight(n32, ir.Imm8(16), ir.Imm1(0)).result; + + IR::U32 m_lo = ir.SignExtendHalfToWord(ir.LeastSignificantHalf(m32)); + IR::U32 m_hi = ir.ArithmeticShiftRight(m32, ir.Imm8(16), ir.Imm1(0)).result; + if (X) { + std::swap(m_lo, m_hi); + } + + const IR::U32 product_lo = ir.Mul(n_lo, m_lo); + const IR::U32 product_hi = ir.Mul(n_hi, m_hi); + const IR::U32 addend = ir.GetRegister(a); + const IR::U32 product = ir.Sub(product_lo, product_hi); + auto result_overflow = ir.AddWithCarry(product, addend, ir.Imm1(0)); + + ir.SetRegister(d, result_overflow.result); + ir.OrQFlag(result_overflow.overflow); + return true; +} + bool ThumbTranslatorVisitor::thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m) { if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) { return UnpredictableInstruction(); diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index 3aa86c02..e62d2fbe 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -134,6 +134,7 @@ struct ThumbTranslatorVisitor final { bool thumb32_MUL(Reg n, Reg d, Reg m); bool thumb32_SMLAD(Reg n, Reg a, Reg d, bool X, Reg m); bool thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m); + bool thumb32_SMLSD(Reg n, Reg a, Reg d, bool X, Reg m); bool thumb32_SMMLA(Reg n, Reg a, Reg d, bool R, Reg m); bool thumb32_SMMLS(Reg n, Reg a, Reg d, bool R, Reg m); bool thumb32_SMMUL(Reg n, Reg d, bool R, Reg m);