diff --git a/src/dynarmic/backend/arm64/verbose_debugging_output.cpp b/src/dynarmic/backend/arm64/verbose_debugging_output.cpp
index fbb26bc4..9fb989ff 100644
--- a/src/dynarmic/backend/arm64/verbose_debugging_output.cpp
+++ b/src/dynarmic/backend/arm64/verbose_debugging_output.cpp
@@ -17,6 +17,8 @@ using namespace oaknut::util;
 
 void EmitVerboseDebuggingOutput(oaknut::CodeGenerator& code, EmitContext& ctx) {
     code.SUB(SP, SP, sizeof(RegisterData));
+    code.MRS(X0, oaknut::SystemReg::FPSR);
+    code.STR(X0, SP, offsetof(RegisterData, fpsr));
     for (int i = 0; i < 30; i++) {
         if (i == 18) {
             continue;  // Platform register
@@ -44,6 +46,8 @@ void EmitVerboseDebuggingOutput(oaknut::CodeGenerator& code, EmitContext& ctx) {
         }
         code.LDR(oaknut::XReg{i}, SP, offsetof(RegisterData, x) + i * sizeof(u64));
     }
+    code.LDR(X0, SP, offsetof(RegisterData, fpsr));
+    code.MSR(oaknut::SystemReg::FPSR, X0);
     code.ADD(SP, SP, sizeof(RegisterData));
 }
 
@@ -101,4 +105,4 @@ void PrintVerboseDebuggingOutputLine(RegisterData& reg_data, HostLocType reg_typ
     fmt::print("\n");
 }
 
-}  // namespace Dynarmic::Backend::Arm64
\ No newline at end of file
+}  // namespace Dynarmic::Backend::Arm64
diff --git a/src/dynarmic/backend/arm64/verbose_debugging_output.h b/src/dynarmic/backend/arm64/verbose_debugging_output.h
index 1099edc4..c180fc67 100644
--- a/src/dynarmic/backend/arm64/verbose_debugging_output.h
+++ b/src/dynarmic/backend/arm64/verbose_debugging_output.h
@@ -46,6 +46,7 @@ struct alignas(16) RegisterData {
     std::array<Vector, 32> q;
     u32 nzcv;
     decltype(StackLayout::spill)* spill;
+    u32 fpsr;
 };
 
 #ifdef _MSC_VER
@@ -55,4 +56,4 @@ struct alignas(16) RegisterData {
 void EmitVerboseDebuggingOutput(oaknut::CodeGenerator& code, EmitContext& ctx);
 void PrintVerboseDebuggingOutputLine(RegisterData& reg_data, HostLocType reg_type, size_t reg_index, size_t inst_index, IR::Type inst_type);
 
-}  // namespace Dynarmic::Backend::Arm64
\ No newline at end of file
+}  // namespace Dynarmic::Backend::Arm64
diff --git a/src/dynarmic/backend/x64/emit_x64.cpp b/src/dynarmic/backend/x64/emit_x64.cpp
index 229c4f18..722d793d 100644
--- a/src/dynarmic/backend/x64/emit_x64.cpp
+++ b/src/dynarmic/backend/x64/emit_x64.cpp
@@ -105,6 +105,7 @@ void EmitX64::PushRSBHelper(Xbyak::Reg64 loc_desc_reg, Xbyak::Reg64 index_reg, I
 
 void EmitX64::EmitVerboseDebuggingOutput(RegAlloc& reg_alloc, const IR::Block& block) {
     code.sub(rsp, sizeof(RegisterData));
+    code.stmxcsr(dword[rsp + offsetof(RegisterData, mxcsr)]);
     for (int i = 0; i < 16; i++) {
         if (rsp.getIdx() == i) {
             continue;
@@ -128,6 +129,7 @@ void EmitX64::EmitVerboseDebuggingOutput(RegAlloc& reg_alloc, const IR::Block& b
     for (int i = 0; i < 16; i++) {
         code.movaps(Xbyak::Xmm{i}, xword[rsp + offsetof(RegisterData, xmms) + 2 * sizeof(u64) * i]);
     }
+    code.ldmxcsr(dword[rsp + offsetof(RegisterData, mxcsr)]);
     code.add(rsp, sizeof(RegisterData));
 }
 
@@ -398,7 +400,9 @@ void EmitX64::ClearCache() {
 
 void EmitX64::InvalidateBasicBlocks(const tsl::robin_set<IR::LocationDescriptor>& locations) {
     code.EnableWriting();
-    SCOPE_EXIT { code.DisableWriting(); };
+    SCOPE_EXIT {
+        code.DisableWriting();
+    };
 
     for (const auto& descriptor : locations) {
         const auto it = block_descriptors.find(descriptor);
diff --git a/src/dynarmic/backend/x64/verbose_debugging_output.h b/src/dynarmic/backend/x64/verbose_debugging_output.h
index 412ce061..4eb2646d 100644
--- a/src/dynarmic/backend/x64/verbose_debugging_output.h
+++ b/src/dynarmic/backend/x64/verbose_debugging_output.h
@@ -25,6 +25,7 @@ struct alignas(16) RegisterData {
     std::array<u64, 16> gprs;
     std::array<Vector, 16> xmms;
     decltype(StackLayout::spill)* spill;
+    u32 mxcsr;
 };
 
 #ifdef _MSC_VER