From 84d49309b90586c23d076b5f7e31ca5040ade050 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 2 Apr 2018 19:46:20 -0400 Subject: [PATCH] A64: Implement USUBW/USUBW2 --- src/frontend/A64/decoder/a64.inc | 2 +- src/frontend/A64/translate/impl/impl.h | 2 +- .../A64/translate/impl/simd_three_different.cpp | 17 +++++++++++++++++ 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index 4b694665..3c4611ca 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -690,7 +690,7 @@ INST(SSUBW, "SSUBW, SSUBW2", "0Q001 //INST(UADDL, "UADDL, UADDL2", "0Q101110zz1mmmmm000000nnnnnddddd") INST(UADDW, "UADDW, UADDW2", "0Q101110zz1mmmmm000100nnnnnddddd") //INST(USUBL, "USUBL, USUBL2", "0Q101110zz1mmmmm001000nnnnnddddd") -//INST(USUBW, "USUBW, USUBW2", "0Q101110zz1mmmmm001100nnnnnddddd") +INST(USUBW, "USUBW, USUBW2", "0Q101110zz1mmmmm001100nnnnnddddd") //INST(RADDHN, "RADDHN, RADDHN2", "0Q101110zz1mmmmm010000nnnnnddddd") //INST(UABAL, "UABAL, UABAL2", "0Q101110zz1mmmmm010100nnnnnddddd") //INST(RSUBHN, "RSUBHN, RSUBHN2", "0Q101110zz1mmmmm011000nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/impl.h b/src/frontend/A64/translate/impl/impl.h index c2e3d453..469ad639 100644 --- a/src/frontend/A64/translate/impl/impl.h +++ b/src/frontend/A64/translate/impl/impl.h @@ -817,7 +817,7 @@ struct TranslatorVisitor final { bool UADDL(bool Q, Imm<2> size, Reg Rm, Reg Rn, Vec Vd); bool UADDW(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool USUBL(bool Q, Imm<2> size, Reg Rm, Reg Rn, Vec Vd); - bool USUBW(bool Q, Imm<2> size, Reg Rm, Vec Vn, Vec Vd); + bool USUBW(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool RADDHN(bool Q, Imm<2> size, Vec Vm, Vec Vn, Reg Rd); bool UABAL(bool Q, Imm<2> size, Reg Rm, Reg Rn, Vec Vd); bool RSUBHN(bool Q, Imm<2> size, Vec Vm, Vec Vn, Reg Rd); diff --git a/src/frontend/A64/translate/impl/simd_three_different.cpp b/src/frontend/A64/translate/impl/simd_three_different.cpp index ef0c8647..edacf662 100644 --- a/src/frontend/A64/translate/impl/simd_three_different.cpp +++ b/src/frontend/A64/translate/impl/simd_three_different.cpp @@ -57,4 +57,21 @@ bool TranslatorVisitor::UADDW(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { return true; } +bool TranslatorVisitor::USUBW(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { + if (size == 0b11) { + return ReservedValue(); + } + + const size_t esize = 8 << size.ZeroExtend(); + const size_t part = Q ? 1 : 0; + + const IR::U128 operand1 = V(128, Vn); + const IR::U128 operand2 = ir.VectorZeroExtend(esize, Vpart(64, Vm, part)); + const IR::U128 result = ir.VectorSub(esize * 2, operand1, operand2); + + V(128, Vd, result); + + return true; +} + } // namespace Dynarmic::A64