Implemented ARM CMP (imm) instruction.
This commit is contained in:
parent
3ef9da9a92
commit
7f09510945
2 changed files with 14 additions and 3 deletions
|
@ -59,7 +59,7 @@ private:
|
|||
};
|
||||
|
||||
template <typename V>
|
||||
static const std::array<ArmMatcher<V>, 3> g_arm_instruction_table = {
|
||||
static const std::array<ArmMatcher<V>, 4> g_arm_instruction_table = {
|
||||
|
||||
#define INST(fn, name, bitstring) detail::detail<ArmMatcher, u32, 32>::GetMatcher<decltype(fn), fn>(name, bitstring)
|
||||
|
||||
|
@ -103,7 +103,7 @@ static const std::array<ArmMatcher<V>, 3> g_arm_instruction_table = {
|
|||
//INST(&V::arm_CMN_imm, "CMN (imm)", "cccc00110111nnnn0000rrrrvvvvvvvv"), // all
|
||||
//INST(&V::arm_CMN_reg, "CMN (reg)", "cccc00010111nnnn0000vvvvvrr0mmmm"), // all
|
||||
//INST(&V::arm_CMN_rsr, "CMN (rsr)", "cccc00010111nnnn0000ssss0rr1mmmm"), // all
|
||||
//INST(&V::arm_CMP_imm, "CMP (imm)", "cccc00110101nnnn0000rrrrvvvvvvvv"), // all
|
||||
INST(&V::arm_CMP_imm, "CMP (imm)", "cccc00110101nnnn0000rrrrvvvvvvvv"), // all
|
||||
//INST(&V::arm_CMP_reg, "CMP (reg)", "cccc00010101nnnn0000vvvvvrr0mmmm"), // all
|
||||
//INST(&V::arm_CMP_rsr, "CMP (rsr)", "cccc00010101nnnn0000ssss0rr1mmmm"), // all
|
||||
//INST(&V::arm_EOR_imm, "EOR (imm)", "cccc0010001Snnnnddddrrrrvvvvvvvv"), // all
|
||||
|
|
|
@ -156,9 +156,20 @@ struct ArmTranslatorVisitor final {
|
|||
bool arm_CMN_rsr(Cond cond, Reg n, Reg s, ShiftType shift, Reg m) {
|
||||
return InterpretThisInstruction();
|
||||
}
|
||||
|
||||
bool arm_CMP_imm(Cond cond, Reg n, int rotate, Imm8 imm8) {
|
||||
return InterpretThisInstruction();
|
||||
u32 imm32 = ArmExpandImm(rotate, imm8);
|
||||
// CMP<c> <Rn>, #<imm>
|
||||
if (ConditionPassed(cond)) {
|
||||
auto result = ir.AddWithCarry(ir.GetRegister(n), ir.Imm32(~imm32), ir.Imm1(true));
|
||||
ir.SetNFlag(ir.MostSignificantBit(result.result));
|
||||
ir.SetZFlag(ir.IsZero(result.result));
|
||||
ir.SetCFlag(result.carry);
|
||||
ir.SetVFlag(result.overflow);
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
bool arm_CMP_reg(Cond cond, Reg n, Imm5 imm5, ShiftType shift, Reg m) {
|
||||
return InterpretThisInstruction();
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue