diff --git a/include/dynarmic/A32/a32.h b/include/dynarmic/A32/a32.h
index a898966f..b9b4d11e 100644
--- a/include/dynarmic/A32/a32.h
+++ b/include/dynarmic/A32/a32.h
@@ -66,9 +66,6 @@ public:
      */
     void ExceptionalExit();
 
-    /// HACK: Change processor ID.
-    void ChangeProcessorID(std::size_t new_processor);
-
     /// View and modify registers.
     std::array<std::uint32_t, 16>& Regs();
     const std::array<std::uint32_t, 16>& Regs() const;
diff --git a/include/dynarmic/A64/a64.h b/include/dynarmic/A64/a64.h
index 83aa536e..996ddbaf 100644
--- a/include/dynarmic/A64/a64.h
+++ b/include/dynarmic/A64/a64.h
@@ -67,9 +67,6 @@ public:
      */
     void ExceptionalExit();
 
-    /// HACK: Change processor ID.
-    void ChangeProcessorID(std::size_t new_processor);
-
     /// Read Stack Pointer
     std::uint64_t GetSP() const;
     /// Modify Stack Pointer
diff --git a/src/backend/x64/a32_emit_x64.h b/src/backend/x64/a32_emit_x64.h
index 51c9ff9e..e6b94871 100644
--- a/src/backend/x64/a32_emit_x64.h
+++ b/src/backend/x64/a32_emit_x64.h
@@ -55,12 +55,8 @@ public:
 
     void InvalidateCacheRanges(const boost::icl::interval_set<u32>& ranges);
 
-    void ChangeProcessorID(size_t value) {
-        conf.processor_id = value;
-    }
-
 protected:
-    A32::UserConfig conf;
+    const A32::UserConfig conf;
     A32::Jit* jit_interface;
     BlockRangeInformation<u32> block_ranges;
 
diff --git a/src/backend/x64/a32_interface.cpp b/src/backend/x64/a32_interface.cpp
index 4a98e82d..4b71f6c6 100644
--- a/src/backend/x64/a32_interface.cpp
+++ b/src/backend/x64/a32_interface.cpp
@@ -63,7 +63,7 @@ struct Jit::Impl {
     BlockOfCode block_of_code;
     A32EmitX64 emitter;
 
-    A32::UserConfig conf;
+    const A32::UserConfig conf;
 
     // Requests made during execution to invalidate the cache are queued up here.
     size_t invalid_cache_generation = 0;
@@ -98,11 +98,6 @@ struct Jit::Impl {
         PerformCacheInvalidation();
     }
 
-    void ChangeProcessorID(size_t value) {
-        conf.processor_id = value;
-        emitter.ChangeProcessorID(value);
-    }
-
     void ClearExclusiveState() {
         jit_state.exclusive_state = 0;
     }
@@ -247,10 +242,6 @@ void Jit::ClearExclusiveState() {
     impl->ClearExclusiveState();
 }
 
-void Jit::ChangeProcessorID(size_t new_processor) {
-    impl->ChangeProcessorID(new_processor);
-}
-
 std::array<u32, 16>& Jit::Regs() {
     return impl->jit_state.Reg;
 }
diff --git a/src/backend/x64/a64_emit_x64.h b/src/backend/x64/a64_emit_x64.h
index cef7ca14..ca76237b 100644
--- a/src/backend/x64/a64_emit_x64.h
+++ b/src/backend/x64/a64_emit_x64.h
@@ -51,12 +51,8 @@ public:
 
     void InvalidateCacheRanges(const boost::icl::interval_set<u64>& ranges);
 
-    void ChangeProcessorID(size_t value) {
-        conf.processor_id = value;
-    }
-
 protected:
-    A64::UserConfig conf;
+    const A64::UserConfig conf;
     A64::Jit* jit_interface;
     BlockRangeInformation<u64> block_ranges;
 
diff --git a/src/backend/x64/a64_interface.cpp b/src/backend/x64/a64_interface.cpp
index fd96a9b8..48353a49 100644
--- a/src/backend/x64/a64_interface.cpp
+++ b/src/backend/x64/a64_interface.cpp
@@ -97,11 +97,6 @@ public:
         is_executing = false;
     }
 
-    void ChangeProcessorID(size_t value) {
-        conf.processor_id = value;
-        emitter.ChangeProcessorID(value);
-    }
-
     void ClearCache() {
         invalidate_entire_cache = true;
         RequestCacheInvalidation();
@@ -292,7 +287,7 @@ private:
 
     bool is_executing = false;
 
-    UserConfig conf;
+    const UserConfig conf;
     A64JitState jit_state;
     BlockOfCode block_of_code;
     A64EmitX64 emitter;
@@ -334,10 +329,6 @@ void Jit::ExceptionalExit() {
     impl->ExceptionalExit();
 }
 
-void Jit::ChangeProcessorID(size_t new_processor) {
-    impl->ChangeProcessorID(new_processor);
-}
-
 u64 Jit::GetSP() const {
     return impl->GetSP();
 }