From 764a93bf5a08858d52513669981ff8113120e7f5 Mon Sep 17 00:00:00 2001 From: "V.Kalyuzhny" Date: Mon, 15 Oct 2018 00:17:56 +0300 Subject: [PATCH] Switch boost::optional to std::optional --- include/dynarmic/A32/coprocessor.h | 18 ++++++++--------- src/backend/x64/a32_emit_x64.cpp | 15 +++++++++++--- src/backend/x64/a32_emit_x64.h | 3 +-- src/backend/x64/a64_emit_x64.cpp | 4 ++-- src/backend/x64/emit_x64.cpp | 4 ++-- src/backend/x64/emit_x64.h | 5 ++--- src/backend/x64/reg_alloc.cpp | 13 +++++++----- src/backend/x64/reg_alloc.h | 12 ++++++++--- src/common/fp/fpcr.h | 6 +++--- src/common/fp/fpsr.h | 2 +- src/common/fp/process_nan.cpp | 18 ++++++++--------- src/common/fp/process_nan.h | 6 +++--- src/common/fp/util.h | 20 +++++++++---------- src/frontend/A32/FPSCR.h | 6 +++--- src/frontend/A32/decoder/arm.h | 7 +++---- src/frontend/A32/decoder/thumb16.h | 8 ++++---- src/frontend/A32/decoder/thumb32.h | 7 +++---- src/frontend/A32/decoder/vfp2.h | 9 +++++---- .../A32/disassembler/disassembler_arm.cpp | 4 ++-- .../A32/disassembler/disassembler_thumb.cpp | 2 +- src/frontend/A32/translate/translate_arm.cpp | 8 ++++---- .../A32/translate/translate_thumb.cpp | 8 ++++---- src/frontend/A64/decoder/a64.h | 7 +++---- src/frontend/A64/ir_emitter.h | 5 ++--- .../translate/impl/floating_point_compare.cpp | 2 +- .../floating_point_conditional_compare.cpp | 2 +- .../floating_point_conditional_select.cpp | 2 +- .../floating_point_conversion_fixed_point.cpp | 2 +- .../floating_point_conversion_integer.cpp | 2 +- ...ing_point_data_processing_one_register.cpp | 2 +- ...g_point_data_processing_three_register.cpp | 2 +- ...ing_point_data_processing_two_register.cpp | 2 +- src/frontend/A64/translate/impl/impl.cpp | 6 +++--- src/frontend/A64/translate/impl/impl.h | 8 ++++---- .../translate/impl/load_store_exclusive.cpp | 4 ++-- .../impl/load_store_multiple_structures.cpp | 5 ++--- .../impl/load_store_single_structure.cpp | 4 ++-- .../translate/impl/simd_scalar_three_same.cpp | 7 ++++--- src/frontend/A64/translate/translate.cpp | 4 ++-- src/frontend/ir/basic_block.cpp | 4 ++-- src/frontend/ir/basic_block.h | 5 ++--- tests/print_info.cpp | 2 +- 42 files changed, 137 insertions(+), 125 deletions(-) diff --git a/include/dynarmic/A32/coprocessor.h b/include/dynarmic/A32/coprocessor.h index 228cba47..dad39eea 100644 --- a/include/dynarmic/A32/coprocessor.h +++ b/include/dynarmic/A32/coprocessor.h @@ -7,8 +7,8 @@ #pragma once #include +#include -#include #include #include @@ -31,8 +31,8 @@ public: * @return Purpose of return value depends on type of callback. */ std::uint64_t (*function)(Jit* jit, void* user_arg, std::uint32_t arg0, std::uint32_t arg1); - /// If boost::none, function will be called with a user_arg parameter containing garbage. - boost::optional user_arg; + /// If std::nullopt, function will be called with a user_arg parameter containing garbage. + std::optional user_arg; }; /** @@ -51,10 +51,10 @@ public: /** * Called when compiling CDP or CDP2 for this coprocessor. - * A return value of boost::none will cause a coprocessor exception to be compiled. + * A return value of std::nullopt will cause a coprocessor exception to be compiled. * arg0, arg1 and return value of callback are ignored. */ - virtual boost::optional CompileInternalOperation(bool two, unsigned opc1, CoprocReg CRd, CoprocReg CRn, CoprocReg CRm, unsigned opc2) = 0; + virtual std::optional CompileInternalOperation(bool two, unsigned opc1, CoprocReg CRd, CoprocReg CRn, CoprocReg CRm, unsigned opc2) = 0; /** * Called when compiling MCR or MCR2 for this coprocessor. @@ -93,19 +93,19 @@ public: /** * Called when compiling LDC or LDC2 for this coprocessor. - * A return value of boost::none will cause a coprocessor exception to be compiled. + * A return value of std::nullopt will cause a coprocessor exception to be compiled. * arg0 of the callback will contain the start address. * arg1 and return value of the callback are ignored. */ - virtual boost::optional CompileLoadWords(bool two, bool long_transfer, CoprocReg CRd, boost::optional option) = 0; + virtual std::optional CompileLoadWords(bool two, bool long_transfer, CoprocReg CRd, std::optional option) = 0; /** * Called when compiling STC or STC2 for this coprocessor. - * A return value of boost::none will cause a coprocessor exception to be compiled. + * A return value of std::nullopt will cause a coprocessor exception to be compiled. * arg0 of the callback will contain the start address. * arg1 and return value of the callback are ignored. */ - virtual boost::optional CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd, boost::optional option) = 0; + virtual std::optional CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd, std::optional option) = 0; }; } // namespace A32 diff --git a/src/backend/x64/a32_emit_x64.cpp b/src/backend/x64/a32_emit_x64.cpp index 09ab5e64..4f997b34 100644 --- a/src/backend/x64/a32_emit_x64.cpp +++ b/src/backend/x64/a32_emit_x64.cpp @@ -954,7 +954,10 @@ static void EmitCoprocessorException() { ASSERT_MSG(false, "Should raise coproc exception here"); } -static void CallCoprocCallback(BlockOfCode& code, RegAlloc& reg_alloc, A32::Jit* jit_interface, A32::Coprocessor::Callback callback, IR::Inst* inst = nullptr, boost::optional arg0 = {}, boost::optional arg1 = {}) { +static void CallCoprocCallback(BlockOfCode& code, RegAlloc& reg_alloc, A32::Jit* jit_interface, + A32::Coprocessor::Callback callback, IR::Inst* inst = nullptr, + std::optional arg0 = {}, + std::optional arg1 = {}) { reg_alloc.HostCall(inst, {}, {}, arg0, arg1); code.mov(code.ABI_PARAM1, reinterpret_cast(jit_interface)); @@ -1170,7 +1173,10 @@ void A32EmitX64::EmitA32CoprocLoadWords(A32EmitContext& ctx, IR::Inst* inst) { bool long_transfer = coproc_info[2] != 0; A32::CoprocReg CRd = static_cast(coproc_info[3]); bool has_option = coproc_info[4] != 0; - boost::optional option{has_option, coproc_info[5]}; + std::optional option = std::nullopt; + if (has_option) { + option = coproc_info[5]; + } std::shared_ptr coproc = config.coprocessors[coproc_num]; if (!coproc) { @@ -1196,7 +1202,10 @@ void A32EmitX64::EmitA32CoprocStoreWords(A32EmitContext& ctx, IR::Inst* inst) { bool long_transfer = coproc_info[2] != 0; A32::CoprocReg CRd = static_cast(coproc_info[3]); bool has_option = coproc_info[4] != 0; - boost::optional option{has_option, coproc_info[5]}; + std::optional option = std::nullopt; + if (has_option) { + option = coproc_info[5]; + } std::shared_ptr coproc = config.coprocessors[coproc_num]; if (!coproc) { diff --git a/src/backend/x64/a32_emit_x64.h b/src/backend/x64/a32_emit_x64.h index 670fedad..c25d783d 100644 --- a/src/backend/x64/a32_emit_x64.h +++ b/src/backend/x64/a32_emit_x64.h @@ -7,8 +7,7 @@ #pragma once #include - -#include +#include #include "backend/x64/a32_jitstate.h" #include "backend/x64/block_range_information.h" diff --git a/src/backend/x64/a64_emit_x64.cpp b/src/backend/x64/a64_emit_x64.cpp index a0f54edc..da37ab68 100644 --- a/src/backend/x64/a64_emit_x64.cpp +++ b/src/backend/x64/a64_emit_x64.cpp @@ -706,13 +706,13 @@ void A64EmitX64::EmitA64SetExclusive(A64EmitContext& ctx, IR::Inst* inst) { code.mov(qword[r15 + offsetof(A64JitState, exclusive_address)], address); } -static Xbyak::RegExp EmitVAddrLookup(BlockOfCode& code, A64EmitContext& ctx, Xbyak::Label& abort, Xbyak::Reg64 vaddr, boost::optional arg_scratch = {}) { +static Xbyak::RegExp EmitVAddrLookup(BlockOfCode& code, A64EmitContext& ctx, Xbyak::Label& abort, Xbyak::Reg64 vaddr, std::optional arg_scratch = {}) { constexpr size_t page_bits = 12; constexpr size_t page_size = 1 << page_bits; const size_t valid_page_index_bits = ctx.conf.page_table_address_space_bits - page_bits; const size_t unused_top_bits = 64 - ctx.conf.page_table_address_space_bits; - Xbyak::Reg64 page_table = arg_scratch.value_or_eval([&]{ return ctx.reg_alloc.ScratchGpr(); }); + Xbyak::Reg64 page_table = arg_scratch ? *arg_scratch : ctx.reg_alloc.ScratchGpr(); Xbyak::Reg64 tmp = ctx.reg_alloc.ScratchGpr(); code.mov(page_table, reinterpret_cast(ctx.conf.page_table)); code.mov(tmp, vaddr); diff --git a/src/backend/x64/emit_x64.cpp b/src/backend/x64/emit_x64.cpp index 191bb050..0ca09f4f 100644 --- a/src/backend/x64/emit_x64.cpp +++ b/src/backend/x64/emit_x64.cpp @@ -38,10 +38,10 @@ EmitX64::EmitX64(BlockOfCode& code) EmitX64::~EmitX64() = default; -boost::optional EmitX64::GetBasicBlock(IR::LocationDescriptor descriptor) const { +std::optional EmitX64::GetBasicBlock(IR::LocationDescriptor descriptor) const { auto iter = block_descriptors.find(descriptor); if (iter == block_descriptors.end()) - return boost::none; + return std::nullopt; return iter->second; } diff --git a/src/backend/x64/emit_x64.h b/src/backend/x64/emit_x64.h index 57dbf8b3..75ee9b3e 100644 --- a/src/backend/x64/emit_x64.h +++ b/src/backend/x64/emit_x64.h @@ -7,14 +7,13 @@ #pragma once #include +#include #include #include #include #include #include -#include - #include #include "backend/x64/reg_alloc.h" @@ -67,7 +66,7 @@ public: virtual ~EmitX64(); /// Looks up an emitted host block in the cache. - boost::optional GetBasicBlock(IR::LocationDescriptor descriptor) const; + std::optional GetBasicBlock(IR::LocationDescriptor descriptor) const; /// Empties the entire cache. virtual void ClearCache(); diff --git a/src/backend/x64/reg_alloc.cpp b/src/backend/x64/reg_alloc.cpp index a6dd72f9..30b3dd6c 100644 --- a/src/backend/x64/reg_alloc.cpp +++ b/src/backend/x64/reg_alloc.cpp @@ -370,10 +370,13 @@ HostLoc RegAlloc::ScratchImpl(HostLocList desired_locations) { return location; } -void RegAlloc::HostCall(IR::Inst* result_def, boost::optional arg0, boost::optional arg1, boost::optional arg2, boost::optional arg3) { +void RegAlloc::HostCall(IR::Inst* result_def, std::optional arg0, + std::optional arg1, + std::optional arg2, + std::optional arg3) { constexpr size_t args_count = 4; constexpr std::array args_hostloc = { ABI_PARAM1, ABI_PARAM2, ABI_PARAM3, ABI_PARAM4 }; - const std::array, args_count> args = { arg0, arg1, arg2, arg3 }; + const std::array, args_count> args = { arg0, arg1, arg2, arg3 }; static const std::vector other_caller_save = [args_hostloc]() { std::vector ret(ABI_ALL_CALLER_SAVE.begin(), ABI_ALL_CALLER_SAVE.end()); @@ -396,7 +399,7 @@ void RegAlloc::HostCall(IR::Inst* result_def, boost::optional arg0, b #if defined(__llvm__) && !defined(_WIN32) // LLVM puts the burden of zero-extension of 8 and 16 bit values on the caller instead of the callee Xbyak::Reg64 reg = HostLocToReg64(args_hostloc[i]); - switch (args[i]->GetType()) { + switch (args[i]->get().GetType()) { case IR::Type::U8: code.movzx(reg.cvt32(), reg.cvt8()); break; @@ -452,12 +455,12 @@ HostLoc RegAlloc::SelectARegister(HostLocList desired_locations) const { return candidates.front(); } -boost::optional RegAlloc::ValueLocation(const IR::Inst* value) const { +std::optional RegAlloc::ValueLocation(const IR::Inst* value) const { for (size_t i = 0; i < hostloc_info.size(); i++) if (hostloc_info[i].ContainsValue(value)) return static_cast(i); - return boost::none; + return std::nullopt; } void RegAlloc::DefineValueImpl(IR::Inst* def_inst, HostLoc host_loc) { diff --git a/src/backend/x64/reg_alloc.h b/src/backend/x64/reg_alloc.h index 39fac368..ffe5264a 100644 --- a/src/backend/x64/reg_alloc.h +++ b/src/backend/x64/reg_alloc.h @@ -8,10 +8,10 @@ #include #include +#include #include #include -#include #include #include "backend/x64/block_of_code.h" @@ -60,6 +60,8 @@ private: struct Argument { public: + using copyable_reference = std::reference_wrapper; + IR::Type GetType() const; bool IsImmediate() const; bool IsVoid() const; @@ -117,7 +119,11 @@ public: Xbyak::Reg64 ScratchGpr(HostLocList desired_locations = any_gpr); Xbyak::Xmm ScratchXmm(HostLocList desired_locations = any_xmm); - void HostCall(IR::Inst* result_def = nullptr, boost::optional arg0 = {}, boost::optional arg1 = {}, boost::optional arg2 = {}, boost::optional arg3 = {}); + void HostCall(IR::Inst* result_def = nullptr, + std::optional arg0 = {}, + std::optional arg1 = {}, + std::optional arg2 = {}, + std::optional arg3 = {}); // TODO: Values in host flags @@ -129,7 +135,7 @@ private: friend struct Argument; HostLoc SelectARegister(HostLocList desired_locations) const; - boost::optional ValueLocation(const IR::Inst* value) const; + std::optional ValueLocation(const IR::Inst* value) const; HostLoc UseImpl(IR::Value use_value, HostLocList desired_locations); HostLoc UseScratchImpl(IR::Value use_value, HostLocList desired_locations); diff --git a/src/common/fp/fpcr.h b/src/common/fp/fpcr.h index 413b5ccd..51b802f7 100644 --- a/src/common/fp/fpcr.h +++ b/src/common/fp/fpcr.h @@ -6,7 +6,7 @@ #pragma once -#include +#include #include "common/assert.h" #include "common/bit_util.h" @@ -75,14 +75,14 @@ public: /// Get the stride of a vector when executing AArch32 VFP instructions. /// This field has no function in AArch64 state. - boost::optional Stride() const { + std::optional Stride() const { switch (Common::Bits<20, 21>(value)) { case 0b00: return 1; case 0b11: return 2; default: - return boost::none; + return std::nullopt; } } diff --git a/src/common/fp/fpsr.h b/src/common/fp/fpsr.h index 3b8ae7e0..a2064e14 100644 --- a/src/common/fp/fpsr.h +++ b/src/common/fp/fpsr.h @@ -6,7 +6,7 @@ #pragma once -#include +#include #include "common/bit_util.h" #include "common/common_types.h" diff --git a/src/common/fp/process_nan.cpp b/src/common/fp/process_nan.cpp index 28f38d6c..a6d81344 100644 --- a/src/common/fp/process_nan.cpp +++ b/src/common/fp/process_nan.cpp @@ -4,7 +4,7 @@ * General Public License version 2 or any later version. */ -#include +#include #include "common/assert.h" #include "common/bit_util.h" @@ -41,7 +41,7 @@ template u32 FPProcessNaN(FPType type, u32 op, FPCR fpcr, FPSR& fpsr); template u64 FPProcessNaN(FPType type, u64 op, FPCR fpcr, FPSR& fpsr); template -boost::optional FPProcessNaNs(FPType type1, FPType type2, FPT op1, FPT op2, FPCR fpcr, FPSR& fpsr) { +std::optional FPProcessNaNs(FPType type1, FPType type2, FPT op1, FPT op2, FPCR fpcr, FPSR& fpsr) { if (type1 == FPType::SNaN) { return FPProcessNaN(type1, op1, fpcr, fpsr); } @@ -54,14 +54,14 @@ boost::optional FPProcessNaNs(FPType type1, FPType type2, FPT op1, FPT op2, if (type2 == FPType::QNaN) { return FPProcessNaN(type2, op2, fpcr, fpsr); } - return boost::none; + return std::nullopt; } -template boost::optional FPProcessNaNs(FPType type1, FPType type2, u32 op1, u32 op2, FPCR fpcr, FPSR& fpsr); -template boost::optional FPProcessNaNs(FPType type1, FPType type2, u64 op1, u64 op2, FPCR fpcr, FPSR& fpsr); +template std::optional FPProcessNaNs(FPType type1, FPType type2, u32 op1, u32 op2, FPCR fpcr, FPSR& fpsr); +template std::optional FPProcessNaNs(FPType type1, FPType type2, u64 op1, u64 op2, FPCR fpcr, FPSR& fpsr); template -boost::optional FPProcessNaNs3(FPType type1, FPType type2, FPType type3, FPT op1, FPT op2, FPT op3, FPCR fpcr, FPSR& fpsr) { +std::optional FPProcessNaNs3(FPType type1, FPType type2, FPType type3, FPT op1, FPT op2, FPT op3, FPCR fpcr, FPSR& fpsr) { if (type1 == FPType::SNaN) { return FPProcessNaN(type1, op1, fpcr, fpsr); } @@ -80,10 +80,10 @@ boost::optional FPProcessNaNs3(FPType type1, FPType type2, FPType type3, FP if (type3 == FPType::QNaN) { return FPProcessNaN(type3, op3, fpcr, fpsr); } - return boost::none; + return std::nullopt; } -template boost::optional FPProcessNaNs3(FPType type1, FPType type2, FPType type3, u32 op1, u32 op2, u32 op3, FPCR fpcr, FPSR& fpsr); -template boost::optional FPProcessNaNs3(FPType type1, FPType type2, FPType type3, u64 op1, u64 op2, u64 op3, FPCR fpcr, FPSR& fpsr); +template std::optional FPProcessNaNs3(FPType type1, FPType type2, FPType type3, u32 op1, u32 op2, u32 op3, FPCR fpcr, FPSR& fpsr); +template std::optional FPProcessNaNs3(FPType type1, FPType type2, FPType type3, u64 op1, u64 op2, u64 op3, FPCR fpcr, FPSR& fpsr); } // namespace Dynarmic::FP diff --git a/src/common/fp/process_nan.h b/src/common/fp/process_nan.h index 6dacdf29..208be016 100644 --- a/src/common/fp/process_nan.h +++ b/src/common/fp/process_nan.h @@ -6,7 +6,7 @@ #pragma once -#include +#include namespace Dynarmic::FP { @@ -18,9 +18,9 @@ template FPT FPProcessNaN(FPType type, FPT op, FPCR fpcr, FPSR& fpsr); template -boost::optional FPProcessNaNs(FPType type1, FPType type2, FPT op1, FPT op2, FPCR fpcr, FPSR& fpsr); +std::optional FPProcessNaNs(FPType type1, FPType type2, FPT op1, FPT op2, FPCR fpcr, FPSR& fpsr); template -boost::optional FPProcessNaNs3(FPType type1, FPType type2, FPType type3, FPT op1, FPT op2, FPT op3, FPCR fpcr, FPSR& fpsr); +std::optional FPProcessNaNs3(FPType type1, FPType type2, FPType type3, FPT op1, FPT op2, FPT op3, FPCR fpcr, FPSR& fpsr); } // namespace Dynarmic::FP diff --git a/src/common/fp/util.h b/src/common/fp/util.h index 94ab2b50..48ce5874 100644 --- a/src/common/fp/util.h +++ b/src/common/fp/util.h @@ -6,7 +6,7 @@ #pragma once -#include +#include #include "common/common_types.h" #include "common/fp/fpcr.h" @@ -51,21 +51,21 @@ constexpr bool IsNaN(FPT value) { } /// Given a single argument, return the NaN value which would be returned by an ARM processor. -/// If the argument isn't a NaN, returns boost::none. +/// If the argument isn't a NaN, returns std::nullopt. template -inline boost::optional ProcessNaNs(FPT a) { +inline std::optional ProcessNaNs(FPT a) { if (IsSNaN(a)) { return a | FPInfo::mantissa_msb; } else if (IsQNaN(a)) { return a; } - return boost::none; + return std::nullopt; } /// Given a pair of arguments, return the NaN value which would be returned by an ARM processor. -/// If neither argument is a NaN, returns boost::none. +/// If neither argument is a NaN, returns std::nullopt. template -inline boost::optional ProcessNaNs(FPT a, FPT b) { +inline std::optional ProcessNaNs(FPT a, FPT b) { if (IsSNaN(a)) { return a | FPInfo::mantissa_msb; } else if (IsSNaN(b)) { @@ -75,13 +75,13 @@ inline boost::optional ProcessNaNs(FPT a, FPT b) { } else if (IsQNaN(b)) { return b; } - return boost::none; + return std::nullopt; } /// Given three arguments, return the NaN value which would be returned by an ARM processor. -/// If none of the arguments is a NaN, returns boost::none. +/// If none of the arguments is a NaN, returns std::nullopt. template -inline boost::optional ProcessNaNs(FPT a, FPT b, FPT c) { +inline std::optional ProcessNaNs(FPT a, FPT b, FPT c) { if (IsSNaN(a)) { return a | FPInfo::mantissa_msb; } else if (IsSNaN(b)) { @@ -95,7 +95,7 @@ inline boost::optional ProcessNaNs(FPT a, FPT b, FPT c) { } else if (IsQNaN(c)) { return c; } - return boost::none; + return std::nullopt; } } // namespace Dynarmic::FP diff --git a/src/frontend/A32/FPSCR.h b/src/frontend/A32/FPSCR.h index 1cafbddb..09abcb87 100644 --- a/src/frontend/A32/FPSCR.h +++ b/src/frontend/A32/FPSCR.h @@ -6,7 +6,7 @@ #pragma once -#include +#include #include "common/bit_util.h" #include "common/common_types.h" @@ -78,14 +78,14 @@ public: } /// Indicates the stride of a vector. - boost::optional Stride() const { + std::optional Stride() const { switch (Common::Bits<20, 21>(value)) { case 0b00: return 1; case 0b11: return 2; default: - return boost::none; + return std::nullopt; } } diff --git a/src/frontend/A32/decoder/arm.h b/src/frontend/A32/decoder/arm.h index 57e9b285..cacb216c 100644 --- a/src/frontend/A32/decoder/arm.h +++ b/src/frontend/A32/decoder/arm.h @@ -10,10 +10,9 @@ #include #include +#include #include -#include - #include "common/bit_util.h" #include "common/common_types.h" #include "frontend/decoder/decoder_detail.h" @@ -43,13 +42,13 @@ std::vector> GetArmDecodeTable() { } template -boost::optional&> DecodeArm(u32 instruction) { +std::optional>> DecodeArm(u32 instruction) { static const auto table = GetArmDecodeTable(); const auto matches_instruction = [instruction](const auto& matcher) { return matcher.Matches(instruction); }; auto iter = std::find_if(table.begin(), table.end(), matches_instruction); - return iter != table.end() ? boost::optional&>(*iter) : boost::none; + return iter != table.end() ? std::optional>>(*iter) : std::nullopt; } } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/decoder/thumb16.h b/src/frontend/A32/decoder/thumb16.h index b04d8c9a..eeb1880a 100644 --- a/src/frontend/A32/decoder/thumb16.h +++ b/src/frontend/A32/decoder/thumb16.h @@ -7,10 +7,10 @@ #pragma once #include +#include +#include #include -#include - #include "common/common_types.h" #include "frontend/decoder/decoder_detail.h" #include "frontend/decoder/matcher.h" @@ -21,7 +21,7 @@ template using Thumb16Matcher = Decoder::Matcher; template -boost::optional&> DecodeThumb16(u16 instruction) { +std::optional>> DecodeThumb16(u16 instruction) { static const std::vector> table = { #define INST(fn, name, bitstring) Decoder::detail::detail>::GetMatcher(fn, name, bitstring) @@ -120,7 +120,7 @@ boost::optional&> DecodeThumb16(u16 instruction) { const auto matches_instruction = [instruction](const auto& matcher){ return matcher.Matches(instruction); }; auto iter = std::find_if(table.begin(), table.end(), matches_instruction); - return iter != table.end() ? boost::optional&>(*iter) : boost::none; + return iter != table.end() ? std::optional>>(*iter) : std::nullopt; } } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/decoder/thumb32.h b/src/frontend/A32/decoder/thumb32.h index d7113524..88fc2be6 100644 --- a/src/frontend/A32/decoder/thumb32.h +++ b/src/frontend/A32/decoder/thumb32.h @@ -7,10 +7,9 @@ #pragma once #include +#include #include -#include - #include "common/common_types.h" #include "frontend/decoder/decoder_detail.h" #include "frontend/decoder/matcher.h" @@ -21,7 +20,7 @@ template using Thumb32Matcher = Decoder::Matcher; template -boost::optional&> DecodeThumb32(u32 instruction) { +std::optional>> DecodeThumb32(u32 instruction) { static const std::vector> table = { #define INST(fn, name, bitstring) Decoder::detail::detail>::GetMatcher(fn, name, bitstring) @@ -349,7 +348,7 @@ boost::optional&> DecodeThumb32(u32 instruction) { const auto matches_instruction = [instruction](const auto& matcher){ return matcher.Matches(instruction); }; auto iter = std::find_if(table.begin(), table.end(), matches_instruction); - return iter != table.end() ? boost::optional&>(*iter) : boost::none; + return iter != table.end() ? std::optional>>(*iter) : std::nullopt; } } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/decoder/vfp2.h b/src/frontend/A32/decoder/vfp2.h index 3a4a5585..0ac842c4 100644 --- a/src/frontend/A32/decoder/vfp2.h +++ b/src/frontend/A32/decoder/vfp2.h @@ -7,9 +7,10 @@ #pragma once #include +#include +#include #include -#include #include "common/common_types.h" #include "frontend/decoder/decoder_detail.h" @@ -21,7 +22,7 @@ template using VFP2Matcher = Decoder::Matcher; template -boost::optional&> DecodeVFP2(u32 instruction) { +std::optional>> DecodeVFP2(u32 instruction) { static const std::vector> table = { #define INST(fn, name, bitstring) Decoder::detail::detail>::GetMatcher(&V::fn, name, bitstring), @@ -31,12 +32,12 @@ boost::optional&> DecodeVFP2(u32 instruction) { }; if ((instruction & 0xF0000000) == 0xF0000000) - return boost::none; // Don't try matching any unconditional instructions. + return std::nullopt; // Don't try matching any unconditional instructions. const auto matches_instruction = [instruction](const auto& matcher){ return matcher.Matches(instruction); }; auto iter = std::find_if(table.begin(), table.end(), matches_instruction); - return iter != table.end() ? boost::optional&>(*iter) : boost::none; + return iter != table.end() ? std::optional>>(*iter) : std::nullopt; } } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/disassembler/disassembler_arm.cpp b/src/frontend/A32/disassembler/disassembler_arm.cpp index 297b1193..bae46d19 100644 --- a/src/frontend/A32/disassembler/disassembler_arm.cpp +++ b/src/frontend/A32/disassembler/disassembler_arm.cpp @@ -1068,9 +1068,9 @@ public: std::string DisassembleArm(u32 instruction) { DisassemblerVisitor visitor; if (auto vfp_decoder = DecodeVFP2(instruction)) { - return vfp_decoder->call(visitor, instruction); + return vfp_decoder->get().call(visitor, instruction); } else if (auto decoder = DecodeArm(instruction)) { - return decoder->call(visitor, instruction); + return decoder->get().call(visitor, instruction); } else { return fmt::format("UNKNOWN: {:x}", instruction); } diff --git a/src/frontend/A32/disassembler/disassembler_thumb.cpp b/src/frontend/A32/disassembler/disassembler_thumb.cpp index 10b3c986..15d14708 100644 --- a/src/frontend/A32/disassembler/disassembler_thumb.cpp +++ b/src/frontend/A32/disassembler/disassembler_thumb.cpp @@ -328,7 +328,7 @@ public: std::string DisassembleThumb16(u16 instruction) { DisassemblerVisitor visitor; auto decoder = DecodeThumb16(instruction); - return !decoder ? fmt::format("UNKNOWN: {:x}", instruction) : decoder->call(visitor, instruction); + return !decoder ? fmt::format("UNKNOWN: {:x}", instruction) : decoder->get().call(visitor, instruction); } } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/translate_arm.cpp b/src/frontend/A32/translate/translate_arm.cpp index 0a77abe7..5cce30f2 100644 --- a/src/frontend/A32/translate/translate_arm.cpp +++ b/src/frontend/A32/translate/translate_arm.cpp @@ -38,9 +38,9 @@ IR::Block TranslateArm(LocationDescriptor descriptor, MemoryReadCodeFuncType mem const u32 arm_instruction = memory_read_code(arm_pc); if (const auto vfp_decoder = DecodeVFP2(arm_instruction)) { - should_continue = vfp_decoder->call(visitor, arm_instruction); + should_continue = vfp_decoder->get().call(visitor, arm_instruction); } else if (const auto decoder = DecodeArm(arm_instruction)) { - should_continue = decoder->call(visitor, arm_instruction); + should_continue = decoder->get().call(visitor, arm_instruction); } else { should_continue = visitor.arm_UDF(); } @@ -73,9 +73,9 @@ bool TranslateSingleArmInstruction(IR::Block& block, LocationDescriptor descript bool should_continue = true; if (const auto vfp_decoder = DecodeVFP2(arm_instruction)) { - should_continue = vfp_decoder->call(visitor, arm_instruction); + should_continue = vfp_decoder->get().call(visitor, arm_instruction); } else if (const auto decoder = DecodeArm(arm_instruction)) { - should_continue = decoder->call(visitor, arm_instruction); + should_continue = decoder->get().call(visitor, arm_instruction); } else { should_continue = visitor.arm_UDF(); } diff --git a/src/frontend/A32/translate/translate_thumb.cpp b/src/frontend/A32/translate/translate_thumb.cpp index 14cf33aa..7f9a3fcc 100644 --- a/src/frontend/A32/translate/translate_thumb.cpp +++ b/src/frontend/A32/translate/translate_thumb.cpp @@ -891,13 +891,13 @@ IR::Block TranslateThumb(LocationDescriptor descriptor, MemoryReadCodeFuncType m if (inst_size == ThumbInstSize::Thumb16) { if (const auto decoder = DecodeThumb16(static_cast(thumb_instruction))) { - should_continue = decoder->call(visitor, static_cast(thumb_instruction)); + should_continue = decoder->get().call(visitor, static_cast(thumb_instruction)); } else { should_continue = visitor.thumb16_UDF(); } } else { if (const auto decoder = DecodeThumb32(thumb_instruction)) { - should_continue = decoder->call(visitor, thumb_instruction); + should_continue = decoder->get().call(visitor, thumb_instruction); } else { should_continue = visitor.thumb32_UDF(); } @@ -920,13 +920,13 @@ bool TranslateSingleThumbInstruction(IR::Block& block, LocationDescriptor descri bool should_continue = true; if (is_thumb_16) { if (const auto decoder = DecodeThumb16(static_cast(thumb_instruction))) { - should_continue = decoder->call(visitor, static_cast(thumb_instruction)); + should_continue = decoder->get().call(visitor, static_cast(thumb_instruction)); } else { should_continue = visitor.thumb16_UDF(); } } else { if (const auto decoder = DecodeThumb32(thumb_instruction)) { - should_continue = decoder->call(visitor, thumb_instruction); + should_continue = decoder->get().call(visitor, thumb_instruction); } else { should_continue = visitor.thumb32_UDF(); } diff --git a/src/frontend/A64/decoder/a64.h b/src/frontend/A64/decoder/a64.h index d049155e..2f17f8ee 100644 --- a/src/frontend/A64/decoder/a64.h +++ b/src/frontend/A64/decoder/a64.h @@ -8,11 +8,10 @@ #include #include +#include #include #include -#include - #include "common/bit_util.h" #include "common/common_types.h" #include "frontend/decoder/decoder_detail.h" @@ -51,13 +50,13 @@ std::vector> GetDecodeTable() { } template -boost::optional&> Decode(u32 instruction) { +std::optional>> Decode(u32 instruction) { static const auto table = GetDecodeTable(); const auto matches_instruction = [instruction](const auto& matcher) { return matcher.Matches(instruction); }; auto iter = std::find_if(table.begin(), table.end(), matches_instruction); - return iter != table.end() ? boost::optional&>(*iter) : boost::none; + return iter != table.end() ? std::optional>>(*iter) : std::nullopt; } } // namespace Dynarmic::A64 diff --git a/src/frontend/A64/ir_emitter.h b/src/frontend/A64/ir_emitter.h index 53a9296d..e0d63a91 100644 --- a/src/frontend/A64/ir_emitter.h +++ b/src/frontend/A64/ir_emitter.h @@ -7,8 +7,7 @@ #pragma once #include - -#include +#include #include @@ -30,7 +29,7 @@ public: explicit IREmitter(IR::Block& block) : IR::IREmitter(block) {} explicit IREmitter(IR::Block& block, LocationDescriptor descriptor) : IR::IREmitter(block), current_location(descriptor) {} - boost::optional current_location; + std::optional current_location; u64 PC(); u64 AlignPC(size_t alignment); diff --git a/src/frontend/A64/translate/impl/floating_point_compare.cpp b/src/frontend/A64/translate/impl/floating_point_compare.cpp index 01ec66cb..888d681b 100644 --- a/src/frontend/A64/translate/impl/floating_point_compare.cpp +++ b/src/frontend/A64/translate/impl/floating_point_compare.cpp @@ -4,7 +4,7 @@ * General Public License version 2 or any later version. */ -#include +#include #include "frontend/A64/translate/impl/impl.h" diff --git a/src/frontend/A64/translate/impl/floating_point_conditional_compare.cpp b/src/frontend/A64/translate/impl/floating_point_conditional_compare.cpp index 72c14c91..0e81a7b0 100644 --- a/src/frontend/A64/translate/impl/floating_point_conditional_compare.cpp +++ b/src/frontend/A64/translate/impl/floating_point_conditional_compare.cpp @@ -4,7 +4,7 @@ * General Public License version 2 or any later version. */ -#include +#include #include "frontend/A64/translate/impl/impl.h" diff --git a/src/frontend/A64/translate/impl/floating_point_conditional_select.cpp b/src/frontend/A64/translate/impl/floating_point_conditional_select.cpp index f870f2c4..0db56510 100644 --- a/src/frontend/A64/translate/impl/floating_point_conditional_select.cpp +++ b/src/frontend/A64/translate/impl/floating_point_conditional_select.cpp @@ -4,7 +4,7 @@ * General Public License version 2 or any later version. */ -#include +#include #include "frontend/A64/translate/impl/impl.h" diff --git a/src/frontend/A64/translate/impl/floating_point_conversion_fixed_point.cpp b/src/frontend/A64/translate/impl/floating_point_conversion_fixed_point.cpp index f2c6f350..434658b1 100644 --- a/src/frontend/A64/translate/impl/floating_point_conversion_fixed_point.cpp +++ b/src/frontend/A64/translate/impl/floating_point_conversion_fixed_point.cpp @@ -4,7 +4,7 @@ * General Public License version 2 or any later version. */ -#include +#include #include "frontend/A64/translate/impl/impl.h" diff --git a/src/frontend/A64/translate/impl/floating_point_conversion_integer.cpp b/src/frontend/A64/translate/impl/floating_point_conversion_integer.cpp index 18d7dd7a..b3e11b88 100644 --- a/src/frontend/A64/translate/impl/floating_point_conversion_integer.cpp +++ b/src/frontend/A64/translate/impl/floating_point_conversion_integer.cpp @@ -4,7 +4,7 @@ * General Public License version 2 or any later version. */ -#include +#include #include "common/fp/rounding_mode.h" #include "frontend/A64/translate/impl/impl.h" diff --git a/src/frontend/A64/translate/impl/floating_point_data_processing_one_register.cpp b/src/frontend/A64/translate/impl/floating_point_data_processing_one_register.cpp index 2d392646..a8ac0d6b 100644 --- a/src/frontend/A64/translate/impl/floating_point_data_processing_one_register.cpp +++ b/src/frontend/A64/translate/impl/floating_point_data_processing_one_register.cpp @@ -4,7 +4,7 @@ * General Public License version 2 or any later version. */ -#include +#include #include "frontend/A64/translate/impl/impl.h" diff --git a/src/frontend/A64/translate/impl/floating_point_data_processing_three_register.cpp b/src/frontend/A64/translate/impl/floating_point_data_processing_three_register.cpp index a6cf8c96..0401cf9f 100644 --- a/src/frontend/A64/translate/impl/floating_point_data_processing_three_register.cpp +++ b/src/frontend/A64/translate/impl/floating_point_data_processing_three_register.cpp @@ -4,7 +4,7 @@ * General Public License version 2 or any later version. */ -#include +#include #include "frontend/A64/translate/impl/impl.h" diff --git a/src/frontend/A64/translate/impl/floating_point_data_processing_two_register.cpp b/src/frontend/A64/translate/impl/floating_point_data_processing_two_register.cpp index e76b312e..bf68a009 100644 --- a/src/frontend/A64/translate/impl/floating_point_data_processing_two_register.cpp +++ b/src/frontend/A64/translate/impl/floating_point_data_processing_two_register.cpp @@ -4,7 +4,7 @@ * General Public License version 2 or any later version. */ -#include +#include #include "frontend/A64/translate/impl/impl.h" diff --git a/src/frontend/A64/translate/impl/impl.cpp b/src/frontend/A64/translate/impl/impl.cpp index 626f6547..6250a574 100644 --- a/src/frontend/A64/translate/impl/impl.cpp +++ b/src/frontend/A64/translate/impl/impl.cpp @@ -39,15 +39,15 @@ bool TranslatorVisitor::RaiseException(Exception exception) { return false; } -boost::optional TranslatorVisitor::DecodeBitMasks(bool immN, Imm<6> imms, Imm<6> immr, bool immediate) { +std::optional TranslatorVisitor::DecodeBitMasks(bool immN, Imm<6> imms, Imm<6> immr, bool immediate) { int len = Common::HighestSetBit((immN ? 1 << 6 : 0) | (imms.ZeroExtend() ^ 0b111111)); if (len < 1) - return boost::none; + return std::nullopt; size_t levels = Common::Ones(len); if (immediate && (imms.ZeroExtend() & levels) == levels) - return boost::none; + return std::nullopt; s32 S = s32(imms.ZeroExtend() & levels); s32 R = s32(immr.ZeroExtend() & levels); diff --git a/src/frontend/A64/translate/impl/impl.h b/src/frontend/A64/translate/impl/impl.h index 32316a5e..6fc859ef 100644 --- a/src/frontend/A64/translate/impl/impl.h +++ b/src/frontend/A64/translate/impl/impl.h @@ -6,7 +6,7 @@ #pragma once -#include +#include #include "frontend/A64/imm.h" #include "frontend/A64/ir_emitter.h" @@ -43,7 +43,7 @@ struct TranslatorVisitor final { u64 wmask, tmask; }; - boost::optional DecodeBitMasks(bool N, Imm<6> immr, Imm<6> imms, bool immediate); + std::optional DecodeBitMasks(bool N, Imm<6> immr, Imm<6> imms, bool immediate); u64 AdvSIMDExpandImm(bool op, Imm<4> cmode, Imm<8> imm8); IR::UAny I(size_t bitsize, u64 value); @@ -1069,7 +1069,7 @@ struct TranslatorVisitor final { bool FNMSUB_float(Imm<2> type, Vec Vm, Vec Va, Vec Vn, Vec Vd); }; -inline boost::optional FPGetDataSize(Imm<2> type) { +inline std::optional FPGetDataSize(Imm<2> type) { switch (type.ZeroExtend()) { case 0b00: return 32; @@ -1078,7 +1078,7 @@ inline boost::optional FPGetDataSize(Imm<2> type) { case 0b11: return 16; } - return boost::none; + return std::nullopt; } } // namespace Dynarmic::A64 diff --git a/src/frontend/A64/translate/impl/load_store_exclusive.cpp b/src/frontend/A64/translate/impl/load_store_exclusive.cpp index e89e2e52..da0f7ec5 100644 --- a/src/frontend/A64/translate/impl/load_store_exclusive.cpp +++ b/src/frontend/A64/translate/impl/load_store_exclusive.cpp @@ -4,13 +4,13 @@ * General Public License version 2 or any later version. */ -#include +#include #include "frontend/A64/translate/impl/impl.h" namespace Dynarmic::A64 { -static bool ExclusiveSharedDecodeAndOperation(TranslatorVisitor& v, bool pair, size_t size, bool L, bool o0, boost::optional Rs, boost::optional Rt2, Reg Rn, Reg Rt) { +static bool ExclusiveSharedDecodeAndOperation(TranslatorVisitor& v, bool pair, size_t size, bool L, bool o0, std::optional Rs, std::optional Rt2, Reg Rn, Reg Rt) { // Shared Decode const AccType acctype = o0 ? AccType::ORDERED : AccType::ATOMIC; diff --git a/src/frontend/A64/translate/impl/load_store_multiple_structures.cpp b/src/frontend/A64/translate/impl/load_store_multiple_structures.cpp index ae47d7b4..9964e6ed 100644 --- a/src/frontend/A64/translate/impl/load_store_multiple_structures.cpp +++ b/src/frontend/A64/translate/impl/load_store_multiple_structures.cpp @@ -5,14 +5,13 @@ */ #include - -#include +#include #include "frontend/A64/translate/impl/impl.h" namespace Dynarmic::A64 { -static bool SharedDecodeAndOperation(TranslatorVisitor& v, bool wback, MemOp memop, bool Q, boost::optional Rm, Imm<4> opcode, Imm<2> size, Reg Rn, Vec Vt) { +static bool SharedDecodeAndOperation(TranslatorVisitor& v, bool wback, MemOp memop, bool Q, std::optional Rm, Imm<4> opcode, Imm<2> size, Reg Rn, Vec Vt) { const size_t datasize = Q ? 128 : 64; const size_t esize = 8 << size.ZeroExtend(); const size_t elements = datasize / esize; diff --git a/src/frontend/A64/translate/impl/load_store_single_structure.cpp b/src/frontend/A64/translate/impl/load_store_single_structure.cpp index 1b784943..873b3530 100644 --- a/src/frontend/A64/translate/impl/load_store_single_structure.cpp +++ b/src/frontend/A64/translate/impl/load_store_single_structure.cpp @@ -4,14 +4,14 @@ * General Public License version 2 or any later version. */ -#include +#include #include "frontend/A64/translate/impl/impl.h" namespace Dynarmic::A64 { static bool SharedDecodeAndOperation(TranslatorVisitor& v, bool wback, MemOp memop, - bool Q, bool S, bool R, bool replicate, boost::optional Rm, + bool Q, bool S, bool R, bool replicate, std::optional Rm, Imm<3> opcode, Imm<2> size, Reg Rn, Vec Vt) { const size_t selem = (opcode.Bit<0>() << 1 | u32{R}) + 1; size_t scale = opcode.Bits<1, 2>(); diff --git a/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp b/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp index 16c28539..2b20bf2f 100644 --- a/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp +++ b/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp @@ -4,7 +4,8 @@ * General Public License version 2 or any later version. */ -#include +#include + #include "common/bit_util.h" #include "frontend/A64/translate/impl/impl.h" @@ -49,7 +50,7 @@ bool RoundingShiftLeft(TranslatorVisitor& v, Imm<2> size, Vec Vm, Vec Vn, Vec Vd return true; } -bool ScalarCompare(TranslatorVisitor& v, Imm<2> size, boost::optional Vm, Vec Vn, Vec Vd, +bool ScalarCompare(TranslatorVisitor& v, Imm<2> size, std::optional Vm, Vec Vn, Vec Vd, ComparisonType type, ComparisonVariant variant) { if (size != 0b11) { return v.ReservedValue(); @@ -59,7 +60,7 @@ bool ScalarCompare(TranslatorVisitor& v, Imm<2> size, boost::optional Vm, V const size_t datasize = 64; const IR::U128 operand1 = v.V(datasize, Vn); - const IR::U128 operand2 = variant == ComparisonVariant::Register ? v.V(datasize, Vm.get()) : v.ir.ZeroVector(); + const IR::U128 operand2 = variant == ComparisonVariant::Register ? v.V(datasize, *Vm) : v.ir.ZeroVector(); const IR::U128 result = [&] { switch (type) { diff --git a/src/frontend/A64/translate/translate.cpp b/src/frontend/A64/translate/translate.cpp index 2c63b806..e9cb59ff 100644 --- a/src/frontend/A64/translate/translate.cpp +++ b/src/frontend/A64/translate/translate.cpp @@ -22,7 +22,7 @@ IR::Block Translate(LocationDescriptor descriptor, MemoryReadCodeFuncType memory const u32 instruction = memory_read_code(pc); if (auto decoder = Decode(instruction)) { - should_continue = decoder->call(visitor, instruction); + should_continue = decoder->get().call(visitor, instruction); } else { should_continue = visitor.InterpretThisInstruction(); } @@ -43,7 +43,7 @@ bool TranslateSingleInstruction(IR::Block& block, LocationDescriptor descriptor, bool should_continue = true; if (auto decoder = Decode(instruction)) { - should_continue = decoder->call(visitor, instruction); + should_continue = decoder->get().call(visitor, instruction); } else { should_continue = visitor.InterpretThisInstruction(); } diff --git a/src/frontend/ir/basic_block.cpp b/src/frontend/ir/basic_block.cpp index 4df9a706..998f7a3e 100644 --- a/src/frontend/ir/basic_block.cpp +++ b/src/frontend/ir/basic_block.cpp @@ -57,7 +57,7 @@ void Block::SetCondition(Cond condition) { } LocationDescriptor Block::ConditionFailedLocation() const { - return cond_failed.get(); + return *cond_failed; } void Block::SetConditionFailedLocation(LocationDescriptor fail_location) { @@ -73,7 +73,7 @@ const size_t& Block::ConditionFailedCycleCount() const { } bool Block::HasConditionFailedLocation() const { - return cond_failed.is_initialized(); + return cond_failed.has_value(); } Block::InstructionList& Block::Instructions() { diff --git a/src/frontend/ir/basic_block.h b/src/frontend/ir/basic_block.h index 40a404d7..d28bcb25 100644 --- a/src/frontend/ir/basic_block.h +++ b/src/frontend/ir/basic_block.h @@ -8,10 +8,9 @@ #include #include +#include #include -#include - #include "common/common_types.h" #include "common/intrusive_list.h" #include "common/memory_pool.h" @@ -139,7 +138,7 @@ private: /// Conditional to pass in order to execute this block Cond cond = Cond::AL; /// Block to execute next if `cond` did not pass. - boost::optional cond_failed = {}; + std::optional cond_failed = {}; /// Number of cycles this block takes to execute if the conditional fails. size_t cond_failed_cycle_count = 0; diff --git a/tests/print_info.cpp b/tests/print_info.cpp index 9486e06a..ac8cbef9 100644 --- a/tests/print_info.cpp +++ b/tests/print_info.cpp @@ -21,7 +21,7 @@ using namespace Dynarmic; const char* GetNameOfInstruction(u32 instruction) { if (auto decoder = A64::Decode(instruction)) { - return decoder->GetName(); + return decoder->get().GetName(); } return ""; }