From 7242388577982a99c5629b1cce0c434fc1d25c20 Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Mon, 20 Apr 2020 20:48:57 +0100
Subject: [PATCH] A64: Specialize arithmetic shift SBFM aliases

---
 src/frontend/A64/decoder/a64.inc                   |  2 ++
 .../translate/impl/data_processing_bitfield.cpp    | 14 ++++++++++++++
 src/frontend/A64/translate/impl/impl.h             |  2 ++
 src/ir_opt/constant_propagation_pass.cpp           |  2 --
 4 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc
index 35752095..7d68ccec 100644
--- a/src/frontend/A64/decoder/a64.inc
+++ b/src/frontend/A64/decoder/a64.inc
@@ -27,6 +27,8 @@ INST(MOVK,                   "MOVK",                                      "z1110
 INST(SBFM,                   "SBFM",                                      "z00100110Nrrrrrrssssssnnnnnddddd")
 INST(BFM,                    "BFM",                                       "z01100110Nrrrrrrssssssnnnnnddddd")
 INST(UBFM,                   "UBFM",                                      "z10100110Nrrrrrrssssssnnnnnddddd")
+INST(ASR_1,                  "ASR (immediate, 32-bit)",                   "00010011000rrrrr011111nnnnnddddd")
+INST(ASR_2,                  "ASR (immediate, 64-bit)",                   "1001001101rrrrrr111111nnnnnddddd")
 INST(SXTB_1,                 "SXTB (32-bit)",                             "0001001100000000000111nnnnnddddd")
 INST(SXTB_2,                 "SXTB (64-bit)",                             "1001001101000000000111nnnnnddddd")
 INST(SXTH_1,                 "SXTH (32-bit)",                             "0001001100000000001111nnnnnddddd")
diff --git a/src/frontend/A64/translate/impl/data_processing_bitfield.cpp b/src/frontend/A64/translate/impl/data_processing_bitfield.cpp
index 48106290..5cda4d51 100644
--- a/src/frontend/A64/translate/impl/data_processing_bitfield.cpp
+++ b/src/frontend/A64/translate/impl/data_processing_bitfield.cpp
@@ -85,6 +85,20 @@ bool TranslatorVisitor::UBFM(bool sf, bool N, Imm<6> immr, Imm<6> imms, Reg Rn,
     return true;
 }
 
+bool TranslatorVisitor::ASR_1(Imm<5> immr, Reg Rn, Reg Rd) {
+    const auto src = X(32, Rn);
+    const auto result = ir.ArithmeticShiftRightMasked(src, ir.Imm32(immr.ZeroExtend<u32>()));
+    X(32, Rd, result);
+    return true;
+}
+
+bool TranslatorVisitor::ASR_2(Imm<6> immr, Reg Rn, Reg Rd) {
+    const auto src = X(64, Rn);
+    const auto result = ir.ArithmeticShiftRightMasked(src, ir.Imm64(immr.ZeroExtend<u64>()));
+    X(64, Rd, result);
+    return true;
+}
+
 bool TranslatorVisitor::SXTB_1(Reg Rn, Reg Rd) {
     const auto src = X(32, Rn);
     const auto result = ir.SignExtendToWord(ir.LeastSignificantByte(src));
diff --git a/src/frontend/A64/translate/impl/impl.h b/src/frontend/A64/translate/impl/impl.h
index 77978499..c7236ec6 100644
--- a/src/frontend/A64/translate/impl/impl.h
+++ b/src/frontend/A64/translate/impl/impl.h
@@ -94,6 +94,8 @@ struct TranslatorVisitor final {
     bool SBFM(bool sf, bool N, Imm<6> immr, Imm<6> imms, Reg Rn, Reg Rd);
     bool BFM(bool sf, bool N, Imm<6> immr, Imm<6> imms, Reg Rn, Reg Rd);
     bool UBFM(bool sf, bool N, Imm<6> immr, Imm<6> imms, Reg Rn, Reg Rd);
+    bool ASR_1(Imm<5> immr, Reg Rn, Reg Rd);
+    bool ASR_2(Imm<6> immr, Reg Rn, Reg Rd);
     bool SXTB_1(Reg Rn, Reg Rd);
     bool SXTB_2(Reg Rn, Reg Rd);
     bool SXTH_1(Reg Rn, Reg Rd);
diff --git a/src/ir_opt/constant_propagation_pass.cpp b/src/ir_opt/constant_propagation_pass.cpp
index 9203171a..17c59fa4 100644
--- a/src/ir_opt/constant_propagation_pass.cpp
+++ b/src/ir_opt/constant_propagation_pass.cpp
@@ -12,12 +12,10 @@
 #include "frontend/ir/basic_block.h"
 #include "frontend/ir/ir_emitter.h"
 #include "frontend/ir/opcodes.h"
-#include "ir_opt/ir_matcher.h"
 #include "ir_opt/passes.h"
 
 namespace Dynarmic::Optimization {
 
-using namespace IRMatcher;
 using Op = Dynarmic::IR::Opcode;
 
 namespace {