IR: Add IR instruction ZeroVector
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2721bb5ace
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5 changed files with 15 additions and 3 deletions
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@ -1207,4 +1207,10 @@ void EmitX64::EmitVectorZeroUpper(EmitContext& ctx, IR::Inst* inst) {
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ctx.reg_alloc.DefineValue(inst, a);
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}
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void EmitX64::EmitZeroVector(EmitContext& ctx, IR::Inst* inst) {
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Xbyak::Xmm a = ctx.reg_alloc.ScratchXmm();
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code.pxor(a, a);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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} // namespace Dynarmic::BackendX64
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@ -29,7 +29,7 @@ bool TranslatorVisitor::CMGT_zero_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 zero = ir.ZeroExtendToQuad(ir.Imm64(0)); // TODO: Optimize
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const IR::U128 zero = ir.ZeroVector();
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const IR::U128 result = ir.VectorGreaterSigned(esize, operand, zero);
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V(datasize, Vd, result);
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return true;
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@ -43,7 +43,7 @@ bool TranslatorVisitor::CMEQ_zero_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 zero = ir.ZeroExtendToQuad(ir.Imm64(0)); // TODO: Optimize
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const IR::U128 zero = ir.ZeroVector();
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IR::U128 result = ir.VectorEqual(esize, operand, zero);
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if (datasize == 64) {
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result = ir.VectorZeroUpper(result);
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@ -60,7 +60,7 @@ bool TranslatorVisitor::CMLT_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 zero = ir.ZeroExtendToQuad(ir.Imm64(0)); // TODO: Optimize
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const IR::U128 zero = ir.ZeroVector();
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const IR::U128 result = ir.VectorLessSigned(esize, operand, zero);
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V(datasize, Vd, result);
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return true;
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@ -1137,6 +1137,10 @@ U128 IREmitter::VectorZeroUpper(const U128& a) {
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return Inst<U128>(Opcode::VectorZeroUpper, a);
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}
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U128 IREmitter::ZeroVector() {
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return Inst<U128>(Opcode::ZeroVector);
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}
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U32U64 IREmitter::FPAbs(const U32U64& a) {
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if (a.GetType() == Type::U32) {
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return Inst<U32>(Opcode::FPAbs32, a);
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@ -241,6 +241,7 @@ public:
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U128 VectorSub(size_t esize, const U128& a, const U128& b);
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U128 VectorZeroExtend(size_t original_esize, const U128& a);
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U128 VectorZeroUpper(const U128& a);
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U128 ZeroVector();
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U32U64 FPAbs(const U32U64& a);
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U32U64 FPAdd(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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@ -288,6 +288,7 @@ OPCODE(VectorZeroExtend16, T::U128, T::U128
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OPCODE(VectorZeroExtend32, T::U128, T::U128 )
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OPCODE(VectorZeroExtend64, T::U128, T::U128 )
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OPCODE(VectorZeroUpper, T::U128, T::U128 )
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OPCODE(ZeroVector, T::U128, )
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// Floating-point operations
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OPCODE(FPAbs32, T::U32, T::U32 )
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