From 66a4940b1124f1927856f4e6d70ec03b8d11b963 Mon Sep 17 00:00:00 2001 From: Merry Date: Fri, 3 Feb 2023 22:16:49 +0000 Subject: [PATCH] a32_get_set_elimination_pass: Fix Set/GetVector for 64-bit registers --- src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp b/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp index 31a523db..95a020b7 100644 --- a/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp +++ b/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp @@ -135,8 +135,11 @@ void A32GetSetElimination(IR::Block& block, A32GetSetEliminationOptions) { const A32::ExtReg reg = inst->GetArg(0).GetA32ExtRegRef(); const size_t reg_index = A32::RegNumber(reg); if (A32::IsDoubleExtReg(reg)) { + ir.SetInsertionPointBefore(std::prev(inst.base())); + const IR::U128 stored_value = ir.VectorZeroUpper(IR::U128{inst->GetArg(1)}); + do_set(ext_reg_vector_double_info[reg_index], - inst->GetArg(1), + stored_value, inst, { ext_reg_singles_info[reg_index * 2 + 0],