Merge branch 'simplify-reg-alloc'
This commit is contained in:
MerryMage
commit
6396bd02f0
6 changed files with 1220 additions and 1317 deletions
File diff suppressed because it is too large
Load diff
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@ -10,12 +10,12 @@ namespace Dynarmic {
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namespace BackendX64 {
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Xbyak::Reg64 HostLocToReg64(HostLoc loc) {
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DEBUG_ASSERT(HostLocIsGPR(loc));
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ASSERT(HostLocIsGPR(loc));
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return Xbyak::Reg64(static_cast<int>(loc));
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}
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Xbyak::Xmm HostLocToXmm(HostLoc loc) {
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DEBUG_ASSERT(HostLocIsXMM(loc));
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ASSERT(HostLocIsXMM(loc));
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return Xbyak::Xmm(static_cast<int>(loc) - static_cast<int>(HostLoc::XMM0));
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}
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@ -23,7 +23,7 @@ Xbyak::Address SpillToOpArg(HostLoc loc) {
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using namespace Xbyak::util;
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static_assert(std::is_same<decltype(JitState::Spill[0]), u64&>::value, "Spill must be u64");
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DEBUG_ASSERT(HostLocIsSpill(loc));
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ASSERT(HostLocIsSpill(loc));
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size_t i = static_cast<size_t>(loc) - static_cast<size_t>(HostLoc::FirstSpill);
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return qword[r15 + offsetof(JitState, Spill) + i * sizeof(u64)];
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@ -22,6 +22,8 @@ static u64 ImmediateToU64(const IR::Value& imm) {
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return u64(imm.GetU1());
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case IR::Type::U8:
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return u64(imm.GetU8());
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case IR::Type::U16:
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return u64(imm.GetU16());
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case IR::Type::U32:
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return u64(imm.GetU32());
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case IR::Type::U64:
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@ -31,253 +33,265 @@ static u64 ImmediateToU64(const IR::Value& imm) {
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}
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}
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static Xbyak::Reg HostLocToX64(HostLoc hostloc) {
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if (HostLocIsGPR(hostloc)) {
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DEBUG_ASSERT(hostloc != HostLoc::RSP && hostloc != HostLoc::R15);
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return HostLocToReg64(hostloc);
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}
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if (HostLocIsXMM(hostloc)) {
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return HostLocToXmm(hostloc);
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}
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ASSERT_MSG(false, "This should never happen.");
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static bool IsSameHostLocClass(HostLoc a, HostLoc b) {
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return (HostLocIsGPR(a) && HostLocIsGPR(b))
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|| (HostLocIsXMM(a) && HostLocIsXMM(b))
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|| (HostLocIsSpill(a) && HostLocIsSpill(b));
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}
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HostLoc RegAlloc::DefHostLocReg(IR::Inst* def_inst, HostLocList desired_locations) {
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DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
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DEBUG_ASSERT_MSG(!ValueLocation(def_inst), "def_inst has already been defined");
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HostLoc location = SelectARegister(desired_locations);
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if (IsRegisterOccupied(location)) {
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SpillRegister(location);
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}
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LocInfo(location).is_being_used = true;
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LocInfo(location).def = def_inst;
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DEBUG_ASSERT(LocInfo(location).IsDef());
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return location;
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}
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void RegAlloc::RegisterAddDef(IR::Inst* def_inst, const IR::Value& use_inst) {
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DEBUG_ASSERT_MSG(!ValueLocation(def_inst), "def_inst has already been defined");
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if (use_inst.IsImmediate()) {
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LoadImmediateIntoHostLocReg(use_inst, DefHostLocReg(def_inst, any_gpr));
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return;
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}
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DEBUG_ASSERT_MSG(ValueLocation(use_inst.GetInst()), "use_inst must already be defined");
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HostLoc location = *ValueLocation(use_inst.GetInst());
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LocInfo(location).values.emplace_back(def_inst);
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use_inst.GetInst()->DecrementRemainingUses();
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DEBUG_ASSERT(LocInfo(location).IsIdle());
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}
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HostLoc RegAlloc::UseDefHostLocReg(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations) {
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if (!use_value.IsImmediate()) {
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return UseDefHostLocReg(use_value.GetInst(), def_inst, desired_locations);
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}
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return LoadImmediateIntoHostLocReg(use_value, DefHostLocReg(def_inst, desired_locations));
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}
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HostLoc RegAlloc::UseDefHostLocReg(IR::Inst* use_inst, IR::Inst* def_inst, HostLocList desired_locations) {
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DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
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DEBUG_ASSERT_MSG(!ValueLocation(def_inst), "def_inst has already been defined");
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DEBUG_ASSERT_MSG(ValueLocation(use_inst), "use_inst has not been defined");
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if (IsLastUse(use_inst)) {
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HostLoc current_location = *ValueLocation(use_inst);
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auto& loc_info = LocInfo(current_location);
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if (loc_info.IsIdle()) {
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loc_info.is_being_used = true;
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loc_info.def = def_inst;
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DEBUG_ASSERT(loc_info.IsUseDef());
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if (HostLocIsSpill(current_location)) {
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HostLoc new_location = SelectARegister(desired_locations);
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if (IsRegisterOccupied(new_location)) {
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SpillRegister(new_location);
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}
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EmitMove(new_location, current_location);
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LocInfo(new_location) = LocInfo(current_location);
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LocInfo(current_location) = {};
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return new_location;
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} else {
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return current_location;
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}
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}
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}
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bool is_floating_point = HostLocIsXMM(*desired_locations.begin());
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if (is_floating_point) {
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DEBUG_ASSERT(use_inst->GetType() == IR::Type::F32 || use_inst->GetType() == IR::Type::F64);
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}
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HostLoc use_reg = UseHostLocReg(use_inst, is_floating_point ? any_xmm : any_gpr);
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HostLoc def_reg = DefHostLocReg(def_inst, desired_locations);
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if (is_floating_point) {
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code->movapd(HostLocToXmm(def_reg), HostLocToXmm(use_reg));
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static void EmitMove(BlockOfCode* code, HostLoc to, HostLoc from) {
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if (HostLocIsXMM(to) && HostLocIsXMM(from)) {
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code->movaps(HostLocToXmm(to), HostLocToXmm(from));
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} else if (HostLocIsGPR(to) && HostLocIsGPR(from)) {
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code->mov(HostLocToReg64(to), HostLocToReg64(from));
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} else if (HostLocIsXMM(to) && HostLocIsGPR(from)) {
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code->movq(HostLocToXmm(to), HostLocToReg64(from));
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} else if (HostLocIsGPR(to) && HostLocIsXMM(from)) {
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code->movq(HostLocToReg64(to), HostLocToXmm(from));
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} else if (HostLocIsXMM(to) && HostLocIsSpill(from)) {
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code->movsd(HostLocToXmm(to), SpillToOpArg(from));
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} else if (HostLocIsSpill(to) && HostLocIsXMM(from)) {
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code->movsd(SpillToOpArg(to), HostLocToXmm(from));
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} else if (HostLocIsGPR(to) && HostLocIsSpill(from)) {
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code->mov(HostLocToReg64(to), SpillToOpArg(from));
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} else if (HostLocIsSpill(to) && HostLocIsGPR(from)) {
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code->mov(SpillToOpArg(to), HostLocToReg64(from));
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} else {
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code->mov(HostLocToReg64(def_reg), HostLocToReg64(use_reg));
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ASSERT_MSG(false, "Invalid RegAlloc::EmitMove");
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}
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return def_reg;
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}
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std::tuple<OpArg, HostLoc> RegAlloc::UseDefOpArgHostLocReg(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations) {
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DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
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DEBUG_ASSERT_MSG(!ValueLocation(def_inst), "def_inst has already been defined");
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DEBUG_ASSERT_MSG(use_value.IsImmediate() || ValueLocation(use_value.GetInst()), "use_inst has not been defined");
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static void EmitExchange(BlockOfCode* code, HostLoc a, HostLoc b) {
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if (HostLocIsGPR(a) && HostLocIsGPR(b)) {
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code->xchg(HostLocToReg64(a), HostLocToReg64(b));
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} else if (HostLocIsXMM(a) && HostLocIsXMM(b)) {
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ASSERT_MSG(false, "Check your code: Exchanging XMM registers is unnecessary");
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} else {
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ASSERT_MSG(false, "Invalid RegAlloc::EmitExchange");
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}
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}
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if (!use_value.IsImmediate()) {
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const IR::Inst* use_inst = use_value.GetInst();
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bool HostLocInfo::IsLocked() const {
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return is_being_used;
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}
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if (IsLastUse(use_inst)) {
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HostLoc current_location = *ValueLocation(use_inst);
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auto& loc_info = LocInfo(current_location);
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if (!loc_info.IsIdle()) {
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if (HostLocIsSpill(current_location)) {
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loc_info.is_being_used = true;
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DEBUG_ASSERT(loc_info.IsUse());
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return std::make_tuple(SpillToOpArg(current_location), DefHostLocReg(def_inst, desired_locations));
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} else {
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loc_info.is_being_used = true;
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loc_info.def = def_inst;
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DEBUG_ASSERT(loc_info.IsUseDef());
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return std::make_tuple(HostLocToX64(current_location), current_location);
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}
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}
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bool HostLocInfo::IsEmpty() const {
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return !is_being_used && values.empty();
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}
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bool HostLocInfo::IsLastUse() const {
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return !is_being_used && std::all_of(values.begin(), values.end(), [](const auto& inst) { return !inst->HasUses(); });
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}
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bool HostLocInfo::ContainsValue(const IR::Inst* inst) const {
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return std::find(values.begin(), values.end(), inst) != values.end();
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}
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void HostLocInfo::ReadLock() {
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ASSERT(!is_scratch);
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is_being_used = true;
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}
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void HostLocInfo::WriteLock() {
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ASSERT(!is_being_used);
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is_being_used = true;
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is_scratch = true;
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}
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void HostLocInfo::AddValue(IR::Inst* inst) {
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values.push_back(inst);
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}
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void HostLocInfo::EndOfAllocScope() {
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const auto to_erase = std::remove_if(values.begin(), values.end(), [](const auto& inst) { return !inst->HasUses(); });
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values.erase(to_erase, values.end());
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is_being_used = false;
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is_scratch = false;
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}
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IR::Type Argument::GetType() const {
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return value.GetType();
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}
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bool Argument::IsImmediate() const {
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return value.IsImmediate();
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}
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bool Argument::GetImmediateU1() const {
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return value.GetU1();
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}
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u8 Argument::GetImmediateU8() const {
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u64 imm = ImmediateToU64(value);
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ASSERT(imm < 0x100);
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return u8(imm);
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}
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u16 Argument::GetImmediateU16() const {
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u64 imm = ImmediateToU64(value);
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ASSERT(imm < 0x10000);
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return u16(imm);
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}
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u32 Argument::GetImmediateU32() const {
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u64 imm = ImmediateToU64(value);
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ASSERT(imm < 0x100000000);
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return u32(imm);
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}
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u64 Argument::GetImmediateU64() const {
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return ImmediateToU64(value);
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}
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bool Argument::IsInGpr() const {
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return HostLocIsGPR(*reg_alloc.ValueLocation(value.GetInst()));
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}
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bool Argument::IsInXmm() const {
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return HostLocIsXMM(*reg_alloc.ValueLocation(value.GetInst()));
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}
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bool Argument::IsInMemory() const {
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return HostLocIsSpill(*reg_alloc.ValueLocation(value.GetInst()));
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}
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std::array<Argument, 3> RegAlloc::GetArgumentInfo(IR::Inst* inst) {
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std::array<Argument, 3> ret = { Argument{*this}, Argument{*this}, Argument{*this} };
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for (size_t i = 0; i < inst->NumArgs(); i++) {
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IR::Value arg = inst->GetArg(i);
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ret[i].value = arg;
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if (!arg.IsImmediate()) {
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arg.GetInst()->DecrementRemainingUses();
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}
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}
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OpArg use_oparg = UseOpArg(use_value, any_gpr);
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HostLoc def_reg = DefHostLocReg(def_inst, desired_locations);
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return std::make_tuple(use_oparg, def_reg);
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return ret;
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}
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HostLoc RegAlloc::UseHostLocReg(IR::Value use_value, HostLocList desired_locations) {
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if (!use_value.IsImmediate()) {
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return UseHostLocReg(use_value.GetInst(), desired_locations);
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}
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return LoadImmediateIntoHostLocReg(use_value, ScratchHostLocReg(desired_locations));
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Xbyak::Reg64 RegAlloc::UseGpr(Argument& arg) {
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ASSERT(!arg.allocated);
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arg.allocated = true;
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return HostLocToReg64(UseImpl(arg.value, any_gpr));
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}
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HostLoc RegAlloc::UseHostLocReg(IR::Inst* use_inst, HostLocList desired_locations) {
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HostLoc current_location;
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bool was_being_used;
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std::tie(current_location, was_being_used) = UseHostLoc(use_inst, desired_locations);
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if (HostLocIsRegister(current_location)) {
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return current_location;
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} else if (HostLocIsSpill(current_location)) {
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HostLoc new_location = SelectARegister(desired_locations);
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if (IsRegisterOccupied(new_location)) {
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SpillRegister(new_location);
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}
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EmitMove(new_location, current_location);
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if (!was_being_used) {
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LocInfo(new_location) = LocInfo(current_location);
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LocInfo(current_location) = {};
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DEBUG_ASSERT(LocInfo(new_location).IsUse());
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} else {
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LocInfo(new_location).is_being_used = true;
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DEBUG_ASSERT(LocInfo(new_location).IsScratch());
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}
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return new_location;
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}
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ASSERT_MSG(false, "Unknown current_location type");
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Xbyak::Xmm RegAlloc::UseXmm(Argument& arg) {
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ASSERT(!arg.allocated);
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arg.allocated = true;
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return HostLocToXmm(UseImpl(arg.value, any_xmm));
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}
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OpArg RegAlloc::UseOpArg(IR::Value use_value, HostLocList desired_locations) {
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OpArg RegAlloc::UseOpArg(Argument& arg) {
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return UseGpr(arg);
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}
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void RegAlloc::Use(Argument& arg, HostLoc host_loc) {
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ASSERT(!arg.allocated);
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arg.allocated = true;
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UseImpl(arg.value, {host_loc});
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}
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Xbyak::Reg64 RegAlloc::UseScratchGpr(Argument& arg) {
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ASSERT(!arg.allocated);
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arg.allocated = true;
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return HostLocToReg64(UseScratchImpl(arg.value, any_gpr));
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}
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Xbyak::Xmm RegAlloc::UseScratchXmm(Argument& arg) {
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ASSERT(!arg.allocated);
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arg.allocated = true;
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return HostLocToXmm(UseScratchImpl(arg.value, any_xmm));
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}
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void RegAlloc::UseScratch(Argument& arg, HostLoc host_loc) {
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ASSERT(!arg.allocated);
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arg.allocated = true;
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UseScratchImpl(arg.value, {host_loc});
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}
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void RegAlloc::DefineValue(IR::Inst* inst, const Xbyak::Reg& reg) {
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ASSERT(reg.getKind() == Xbyak::Operand::XMM || reg.getKind() == Xbyak::Operand::REG);
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HostLoc hostloc = static_cast<HostLoc>(reg.getIdx() + static_cast<size_t>(reg.getKind() == Xbyak::Operand::XMM ? HostLoc::XMM0 : HostLoc::RAX));
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DefineValueImpl(inst, hostloc);
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}
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void RegAlloc::DefineValue(IR::Inst* inst, Argument& arg) {
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ASSERT(!arg.allocated);
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arg.allocated = true;
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DefineValueImpl(inst, arg.value);
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}
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Xbyak::Reg64 RegAlloc::ScratchGpr(HostLocList desired_locations) {
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return HostLocToReg64(ScratchImpl(desired_locations));
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}
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Xbyak::Xmm RegAlloc::ScratchXmm(HostLocList desired_locations) {
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return HostLocToXmm(ScratchImpl(desired_locations));
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}
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HostLoc RegAlloc::UseImpl(IR::Value use_value, HostLocList desired_locations) {
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if (use_value.IsImmediate()) {
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ASSERT_MSG(false, "UseOpArg does not support immediates");
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return {}; // return a None
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return LoadImmediate(use_value, ScratchImpl(desired_locations));
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}
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IR::Inst* use_inst = use_value.GetInst();
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const HostLoc current_location = *ValueLocation(use_inst);
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HostLoc current_location;
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bool was_being_used;
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std::tie(current_location, was_being_used) = UseHostLoc(use_inst, desired_locations);
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if (HostLocIsRegister(current_location)) {
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return HostLocToX64(current_location);
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} else if (HostLocIsSpill(current_location)) {
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return SpillToOpArg(current_location);
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const bool can_use_current_location = std::find(desired_locations.begin(), desired_locations.end(), current_location) != desired_locations.end();
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if (can_use_current_location) {
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LocInfo(current_location).ReadLock();
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return current_location;
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}
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ASSERT_MSG(false, "Unknown current_location type");
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if (LocInfo(current_location).IsLocked()) {
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return UseScratchImpl(use_value, desired_locations);
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}
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const HostLoc destination_location = SelectARegister(desired_locations);
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if (IsSameHostLocClass(destination_location, current_location)) {
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Exchange(destination_location, current_location);
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} else {
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MoveOutOfTheWay(destination_location);
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Move(destination_location, current_location);
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}
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LocInfo(destination_location).ReadLock();
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return destination_location;
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}
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HostLoc RegAlloc::UseScratchHostLocReg(IR::Value use_value, HostLocList desired_locations) {
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if (!use_value.IsImmediate()) {
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return UseScratchHostLocReg(use_value.GetInst(), desired_locations);
|
||||
HostLoc RegAlloc::UseScratchImpl(IR::Value use_value, HostLocList desired_locations) {
|
||||
if (use_value.IsImmediate()) {
|
||||
return LoadImmediate(use_value, ScratchImpl(desired_locations));
|
||||
}
|
||||
|
||||
return LoadImmediateIntoHostLocReg(use_value, ScratchHostLocReg(desired_locations));
|
||||
IR::Inst* use_inst = use_value.GetInst();
|
||||
const HostLoc current_location = *ValueLocation(use_inst);
|
||||
|
||||
const bool can_use_current_location = std::find(desired_locations.begin(), desired_locations.end(), current_location) != desired_locations.end();
|
||||
if (can_use_current_location && !LocInfo(current_location).IsLocked()) {
|
||||
MoveOutOfTheWay(current_location);
|
||||
LocInfo(current_location).WriteLock();
|
||||
return current_location;
|
||||
}
|
||||
|
||||
const HostLoc destination_location = SelectARegister(desired_locations);
|
||||
MoveOutOfTheWay(destination_location);
|
||||
CopyToScratch(destination_location, current_location);
|
||||
LocInfo(destination_location).WriteLock();
|
||||
return destination_location;
|
||||
}
|
||||
|
||||
HostLoc RegAlloc::UseScratchHostLocReg(IR::Inst* use_inst, HostLocList desired_locations) {
|
||||
DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
|
||||
DEBUG_ASSERT_MSG(ValueLocation(use_inst), "use_inst has not been defined");
|
||||
ASSERT_MSG(use_inst->HasUses(), "use_inst ran out of uses. (Use-d an IR::Inst* too many times)");
|
||||
|
||||
HostLoc current_location = *ValueLocation(use_inst);
|
||||
HostLoc new_location = SelectARegister(desired_locations);
|
||||
if (IsRegisterOccupied(new_location)) {
|
||||
SpillRegister(new_location);
|
||||
}
|
||||
|
||||
if (HostLocIsSpill(current_location)) {
|
||||
EmitMove(new_location, current_location);
|
||||
LocInfo(new_location).is_being_used = true;
|
||||
use_inst->DecrementRemainingUses();
|
||||
DEBUG_ASSERT(LocInfo(new_location).IsScratch());
|
||||
return new_location;
|
||||
} else if (HostLocIsRegister(current_location)) {
|
||||
ASSERT(LocInfo(current_location).IsIdle()
|
||||
|| LocInfo(current_location).IsUse()
|
||||
|| LocInfo(current_location).IsUseDef());
|
||||
|
||||
if (current_location != new_location) {
|
||||
EmitMove(new_location, current_location);
|
||||
} else {
|
||||
ASSERT(LocInfo(current_location).IsIdle());
|
||||
}
|
||||
|
||||
LocInfo(new_location).is_being_used = true;
|
||||
LocInfo(new_location).values.clear();
|
||||
use_inst->DecrementRemainingUses();
|
||||
DEBUG_ASSERT(LocInfo(new_location).IsScratch());
|
||||
return new_location;
|
||||
}
|
||||
|
||||
ASSERT_MSG(false, "Invalid current_location");
|
||||
}
|
||||
|
||||
HostLoc RegAlloc::ScratchHostLocReg(HostLocList desired_locations) {
|
||||
DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
|
||||
|
||||
HostLoc RegAlloc::ScratchImpl(HostLocList desired_locations) {
|
||||
HostLoc location = SelectARegister(desired_locations);
|
||||
|
||||
if (IsRegisterOccupied(location)) {
|
||||
SpillRegister(location);
|
||||
}
|
||||
|
||||
// Update state
|
||||
LocInfo(location).is_being_used = true;
|
||||
|
||||
DEBUG_ASSERT(LocInfo(location).IsScratch());
|
||||
MoveOutOfTheWay(location);
|
||||
LocInfo(location).WriteLock();
|
||||
return location;
|
||||
}
|
||||
|
||||
void RegAlloc::HostCall(IR::Inst* result_def, IR::Value arg0_use, IR::Value arg1_use, IR::Value arg2_use, IR::Value arg3_use) {
|
||||
void RegAlloc::HostCall(IR::Inst* result_def, boost::optional<Argument&> arg0, boost::optional<Argument&> arg1, boost::optional<Argument&> arg2, boost::optional<Argument&> arg3) {
|
||||
constexpr size_t args_count = 4;
|
||||
constexpr std::array<HostLoc, args_count> args_hostloc = { ABI_PARAM1, ABI_PARAM2, ABI_PARAM3, ABI_PARAM4 };
|
||||
const std::array<IR::Value*, args_count> args = {&arg0_use, &arg1_use, &arg2_use, &arg3_use};
|
||||
const std::array<boost::optional<Argument&>, args_count> args = { arg0, arg1, arg2, arg3 };
|
||||
|
||||
const static std::vector<HostLoc> other_caller_save = [args_hostloc](){
|
||||
const static std::vector<HostLoc> other_caller_save = [args_hostloc]() {
|
||||
std::vector<HostLoc> ret(ABI_ALL_CALLER_SAVE.begin(), ABI_ALL_CALLER_SAVE.end());
|
||||
|
||||
for (auto hostloc : args_hostloc)
|
||||
|
|
@ -286,33 +300,45 @@ void RegAlloc::HostCall(IR::Inst* result_def, IR::Value arg0_use, IR::Value arg1
|
|||
return ret;
|
||||
}();
|
||||
|
||||
// TODO: This works but almost certainly leads to suboptimal generated code.
|
||||
|
||||
ScratchGpr({ABI_RETURN});
|
||||
if (result_def) {
|
||||
DefHostLocReg(result_def, {ABI_RETURN});
|
||||
} else {
|
||||
ScratchHostLocReg({ABI_RETURN});
|
||||
DefineValueImpl(result_def, ABI_RETURN);
|
||||
}
|
||||
|
||||
for (size_t i = 0; i < args_count; i++) {
|
||||
if (!args[i]->IsEmpty()) {
|
||||
UseScratchHostLocReg(*args[i], {args_hostloc[i]});
|
||||
} else {
|
||||
ScratchHostLocReg({args_hostloc[i]});
|
||||
if (args[i]) {
|
||||
UseScratch(*args[i], args_hostloc[i]);
|
||||
}
|
||||
}
|
||||
|
||||
for (size_t i = 0; i < args_count; i++) {
|
||||
if (!args[i]) {
|
||||
// TODO: Force spill
|
||||
ScratchGpr({args_hostloc[i]});
|
||||
}
|
||||
}
|
||||
|
||||
for (HostLoc caller_saved : other_caller_save) {
|
||||
ScratchHostLocReg({caller_saved});
|
||||
ScratchImpl({caller_saved});
|
||||
}
|
||||
}
|
||||
|
||||
void RegAlloc::EndOfAllocScope() {
|
||||
for (auto& iter : hostloc_info) {
|
||||
iter.EndOfAllocScope();
|
||||
}
|
||||
}
|
||||
|
||||
void RegAlloc::AssertNoMoreUses() {
|
||||
ASSERT(std::all_of(hostloc_info.begin(), hostloc_info.end(), [](const auto& i) { return i.IsEmpty(); }));
|
||||
}
|
||||
|
||||
HostLoc RegAlloc::SelectARegister(HostLocList desired_locations) const {
|
||||
std::vector<HostLoc> candidates = desired_locations;
|
||||
|
||||
// Find all locations that have not been allocated..
|
||||
auto allocated_locs = std::partition(candidates.begin(), candidates.end(), [this](auto loc){
|
||||
return !this->IsRegisterAllocated(loc);
|
||||
return !this->LocInfo(loc).IsLocked();
|
||||
});
|
||||
candidates.erase(allocated_locs, candidates.end());
|
||||
ASSERT_MSG(!candidates.empty(), "All candidate registers have already been allocated");
|
||||
|
|
@ -321,7 +347,7 @@ HostLoc RegAlloc::SelectARegister(HostLocList desired_locations) const {
|
|||
// TODO: Actually do LRU or something. Currently we just try to pick something without a value if possible.
|
||||
|
||||
std::partition(candidates.begin(), candidates.end(), [this](auto loc){
|
||||
return !this->IsRegisterOccupied(loc);
|
||||
return this->LocInfo(loc).IsEmpty();
|
||||
});
|
||||
|
||||
return candidates.front();
|
||||
|
|
@ -329,152 +355,33 @@ HostLoc RegAlloc::SelectARegister(HostLocList desired_locations) const {
|
|||
|
||||
boost::optional<HostLoc> RegAlloc::ValueLocation(const IR::Inst* value) const {
|
||||
for (size_t i = 0; i < HostLocCount; i++)
|
||||
for (const IR::Inst* v : hostloc_info[i].values)
|
||||
if (v == value)
|
||||
return boost::make_optional<HostLoc>(static_cast<HostLoc>(i));
|
||||
if (hostloc_info[i].ContainsValue(value))
|
||||
return boost::make_optional<HostLoc>(static_cast<HostLoc>(i));
|
||||
|
||||
return boost::none;
|
||||
}
|
||||
|
||||
bool RegAlloc::IsRegisterOccupied(HostLoc loc) const {
|
||||
const auto& info = LocInfo(loc);
|
||||
|
||||
return !info.values.empty() || info.def;
|
||||
void RegAlloc::DefineValueImpl(IR::Inst* def_inst, HostLoc host_loc) {
|
||||
ASSERT_MSG(!ValueLocation(def_inst), "def_inst has already been defined");
|
||||
LocInfo(host_loc).AddValue(def_inst);
|
||||
}
|
||||
|
||||
bool RegAlloc::IsRegisterAllocated(HostLoc loc) const {
|
||||
return LocInfo(loc).is_being_used;
|
||||
}
|
||||
void RegAlloc::DefineValueImpl(IR::Inst* def_inst, const IR::Value& use_inst) {
|
||||
ASSERT_MSG(!ValueLocation(def_inst), "def_inst has already been defined");
|
||||
|
||||
bool RegAlloc::IsLastUse(const IR::Inst* inst) const {
|
||||
if (inst->UseCount() > 1)
|
||||
return false;
|
||||
return LocInfo(*ValueLocation(inst)).values.size() == 1;
|
||||
}
|
||||
|
||||
void RegAlloc::SpillRegister(HostLoc loc) {
|
||||
ASSERT_MSG(HostLocIsRegister(loc), "Only registers can be spilled");
|
||||
ASSERT_MSG(IsRegisterOccupied(loc), "There is no need to spill unoccupied registers");
|
||||
ASSERT_MSG(!IsRegisterAllocated(loc), "Registers that have been allocated must not be spilt");
|
||||
|
||||
HostLoc new_loc = FindFreeSpill();
|
||||
|
||||
EmitMove(new_loc, loc);
|
||||
|
||||
LocInfo(new_loc) = LocInfo(loc);
|
||||
LocInfo(loc) = {};
|
||||
}
|
||||
|
||||
HostLoc RegAlloc::FindFreeSpill() const {
|
||||
for (size_t i = 0; i < SpillCount; i++)
|
||||
if (!IsRegisterOccupied(HostLocSpill(i)))
|
||||
return HostLocSpill(i);
|
||||
|
||||
ASSERT_MSG(false, "All spill locations are full");
|
||||
}
|
||||
|
||||
void RegAlloc::EndOfAllocScope() {
|
||||
for (auto& iter : hostloc_info) {
|
||||
iter.is_being_used = false;
|
||||
if (iter.def) {
|
||||
iter.values.clear();
|
||||
iter.values.emplace_back(iter.def);
|
||||
iter.def = nullptr;
|
||||
}
|
||||
if (!iter.values.empty()) {
|
||||
auto to_erase = std::remove_if(iter.values.begin(), iter.values.end(),
|
||||
[](const auto& inst){ return !inst->HasUses(); });
|
||||
iter.values.erase(to_erase, iter.values.end());
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void RegAlloc::AssertNoMoreUses() {
|
||||
ASSERT(std::all_of(hostloc_info.begin(), hostloc_info.end(), [](const auto& i){ return i.values.empty(); }));
|
||||
}
|
||||
|
||||
void RegAlloc::Reset() {
|
||||
hostloc_info.fill({});
|
||||
}
|
||||
|
||||
void RegAlloc::EmitMove(HostLoc to, HostLoc from) {
|
||||
if (HostLocIsXMM(to) && HostLocIsSpill(from)) {
|
||||
code->movsd(HostLocToXmm(to), SpillToOpArg(from));
|
||||
} else if (HostLocIsSpill(to) && HostLocIsXMM(from)) {
|
||||
code->movsd(SpillToOpArg(to), HostLocToXmm(from));
|
||||
} else if (HostLocIsXMM(to) && HostLocIsXMM(from)) {
|
||||
code->movaps(HostLocToXmm(to), HostLocToXmm(from));
|
||||
} else if (HostLocIsGPR(to) && HostLocIsSpill(from)) {
|
||||
code->mov(HostLocToReg64(to), SpillToOpArg(from));
|
||||
} else if (HostLocIsSpill(to) && HostLocIsGPR(from)) {
|
||||
code->mov(SpillToOpArg(to), HostLocToReg64(from));
|
||||
} else if (HostLocIsGPR(to) && HostLocIsGPR(from)){
|
||||
code->mov(HostLocToReg64(to), HostLocToReg64(from));
|
||||
} else {
|
||||
ASSERT_MSG(false, "Invalid RegAlloc::EmitMove");
|
||||
}
|
||||
}
|
||||
|
||||
void RegAlloc::EmitExchange(HostLoc a, HostLoc b) {
|
||||
if (HostLocIsGPR(a) && HostLocIsGPR(b)) {
|
||||
code->xchg(HostLocToReg64(a), HostLocToReg64(b));
|
||||
} else if (HostLocIsXMM(a) && HostLocIsXMM(b)) {
|
||||
ASSERT_MSG(false, "Exchange is unnecessary for XMM registers");
|
||||
} else {
|
||||
ASSERT_MSG(false, "Invalid RegAlloc::EmitExchange");
|
||||
}
|
||||
}
|
||||
|
||||
std::tuple<HostLoc, bool> RegAlloc::UseHostLoc(IR::Inst* use_inst, HostLocList desired_locations) {
|
||||
DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
|
||||
DEBUG_ASSERT_MSG(ValueLocation(use_inst), "use_inst has not been defined");
|
||||
|
||||
HostLoc current_location = *ValueLocation(use_inst);
|
||||
auto iter = std::find(desired_locations.begin(), desired_locations.end(), current_location);
|
||||
if (iter != desired_locations.end()) {
|
||||
if (LocInfo(current_location).IsDef()) {
|
||||
HostLoc new_location = SelectARegister(desired_locations);
|
||||
if (IsRegisterOccupied(new_location)) {
|
||||
SpillRegister(new_location);
|
||||
}
|
||||
EmitMove(new_location, current_location);
|
||||
LocInfo(new_location).is_being_used = true;
|
||||
LocInfo(new_location).values.emplace_back(use_inst);
|
||||
use_inst->DecrementRemainingUses();
|
||||
DEBUG_ASSERT(LocInfo(new_location).IsUse());
|
||||
return std::make_tuple(new_location, false);
|
||||
} else {
|
||||
bool was_being_used = LocInfo(current_location).is_being_used;
|
||||
ASSERT(LocInfo(current_location).IsUse() || LocInfo(current_location).IsIdle());
|
||||
LocInfo(current_location).is_being_used = true;
|
||||
use_inst->DecrementRemainingUses();
|
||||
DEBUG_ASSERT(LocInfo(current_location).IsUse());
|
||||
return std::make_tuple(current_location, was_being_used);
|
||||
}
|
||||
if (use_inst.IsImmediate()) {
|
||||
HostLoc location = ScratchImpl(any_gpr);
|
||||
DefineValueImpl(def_inst, location);
|
||||
LoadImmediate(use_inst, location);
|
||||
return;
|
||||
}
|
||||
|
||||
if (HostLocIsSpill(current_location)) {
|
||||
bool was_being_used = LocInfo(current_location).is_being_used;
|
||||
LocInfo(current_location).is_being_used = true;
|
||||
use_inst->DecrementRemainingUses();
|
||||
DEBUG_ASSERT(LocInfo(current_location).IsUse());
|
||||
return std::make_tuple(current_location, was_being_used);
|
||||
} else if (HostLocIsRegister(current_location)) {
|
||||
HostLoc new_location = SelectARegister(desired_locations);
|
||||
ASSERT(LocInfo(current_location).IsIdle());
|
||||
EmitExchange(new_location, current_location);
|
||||
std::swap(LocInfo(new_location), LocInfo(current_location));
|
||||
LocInfo(new_location).is_being_used = true;
|
||||
use_inst->DecrementRemainingUses();
|
||||
DEBUG_ASSERT(LocInfo(new_location).IsUse());
|
||||
return std::make_tuple(new_location, false);
|
||||
}
|
||||
|
||||
ASSERT_MSG(false, "Invalid current_location");
|
||||
return std::make_tuple(static_cast<HostLoc>(-1), false);
|
||||
ASSERT_MSG(ValueLocation(use_inst.GetInst()), "use_inst must already be defined");
|
||||
HostLoc location = *ValueLocation(use_inst.GetInst());
|
||||
DefineValueImpl(def_inst, location);
|
||||
}
|
||||
|
||||
HostLoc RegAlloc::LoadImmediateIntoHostLocReg(IR::Value imm, HostLoc host_loc) {
|
||||
HostLoc RegAlloc::LoadImmediate(IR::Value imm, HostLoc host_loc) {
|
||||
ASSERT_MSG(imm.IsImmediate(), "imm is not an immediate");
|
||||
|
||||
Xbyak::Reg64 reg = HostLocToReg64(host_loc);
|
||||
|
|
@ -487,5 +394,76 @@ HostLoc RegAlloc::LoadImmediateIntoHostLocReg(IR::Value imm, HostLoc host_loc) {
|
|||
return host_loc;
|
||||
}
|
||||
|
||||
void RegAlloc::Move(HostLoc to, HostLoc from) {
|
||||
ASSERT(LocInfo(to).IsEmpty() && !LocInfo(from).IsLocked());
|
||||
|
||||
if (LocInfo(from).IsEmpty()) {
|
||||
return;
|
||||
}
|
||||
|
||||
LocInfo(to) = LocInfo(from);
|
||||
LocInfo(from) = {};
|
||||
|
||||
EmitMove(code, to, from);
|
||||
}
|
||||
|
||||
void RegAlloc::CopyToScratch(HostLoc to, HostLoc from) {
|
||||
ASSERT(LocInfo(to).IsEmpty() && !LocInfo(from).IsEmpty());
|
||||
|
||||
EmitMove(code, to, from);
|
||||
}
|
||||
|
||||
void RegAlloc::Exchange(HostLoc a, HostLoc b) {
|
||||
ASSERT(!LocInfo(a).IsLocked() && !LocInfo(b).IsLocked());
|
||||
|
||||
if (LocInfo(a).IsEmpty()) {
|
||||
Move(a, b);
|
||||
return;
|
||||
}
|
||||
|
||||
if (LocInfo(b).IsEmpty()) {
|
||||
Move(b, a);
|
||||
return;
|
||||
}
|
||||
|
||||
std::swap(LocInfo(a), LocInfo(b));
|
||||
|
||||
EmitExchange(code, a, b);
|
||||
}
|
||||
|
||||
void RegAlloc::MoveOutOfTheWay(HostLoc reg) {
|
||||
ASSERT(!LocInfo(reg).IsLocked());
|
||||
if (!LocInfo(reg).IsEmpty()) {
|
||||
SpillRegister(reg);
|
||||
}
|
||||
}
|
||||
|
||||
void RegAlloc::SpillRegister(HostLoc loc) {
|
||||
ASSERT_MSG(HostLocIsRegister(loc), "Only registers can be spilled");
|
||||
ASSERT_MSG(!LocInfo(loc).IsEmpty(), "There is no need to spill unoccupied registers");
|
||||
ASSERT_MSG(!LocInfo(loc).IsLocked(), "Registers that have been allocated must not be spilt");
|
||||
|
||||
HostLoc new_loc = FindFreeSpill();
|
||||
Move(new_loc, loc);
|
||||
}
|
||||
|
||||
HostLoc RegAlloc::FindFreeSpill() const {
|
||||
for (size_t i = 0; i < SpillCount; i++)
|
||||
if (LocInfo(HostLocSpill(i)).IsEmpty())
|
||||
return HostLocSpill(i);
|
||||
|
||||
ASSERT_MSG(false, "All spill locations are full");
|
||||
}
|
||||
|
||||
HostLocInfo& RegAlloc::LocInfo(HostLoc loc) {
|
||||
ASSERT(loc != HostLoc::RSP && loc != HostLoc::R15);
|
||||
return hostloc_info[static_cast<size_t>(loc)];
|
||||
}
|
||||
|
||||
const HostLocInfo& RegAlloc::LocInfo(HostLoc loc) const {
|
||||
ASSERT(loc != HostLoc::RSP && loc != HostLoc::R15);
|
||||
return hostloc_info[static_cast<size_t>(loc)];
|
||||
}
|
||||
|
||||
} // namespace BackendX64
|
||||
} // namespace Dynarmic
|
||||
|
|
|
|||
|
|
@ -22,62 +22,78 @@
|
|||
namespace Dynarmic {
|
||||
namespace BackendX64 {
|
||||
|
||||
class RegAlloc;
|
||||
|
||||
struct HostLocInfo {
|
||||
public:
|
||||
bool IsLocked() const;
|
||||
bool IsEmpty() const;
|
||||
bool IsLastUse() const;
|
||||
|
||||
bool ContainsValue(const IR::Inst* inst) const;
|
||||
|
||||
void ReadLock();
|
||||
void WriteLock();
|
||||
|
||||
void AddValue(IR::Inst* inst);
|
||||
|
||||
void EndOfAllocScope();
|
||||
|
||||
private:
|
||||
std::vector<IR::Inst*> values;
|
||||
bool is_being_used = false;
|
||||
bool is_scratch = false;
|
||||
};
|
||||
|
||||
struct Argument {
|
||||
public:
|
||||
IR::Type GetType() const;
|
||||
bool IsImmediate() const;
|
||||
|
||||
bool GetImmediateU1() const;
|
||||
u8 GetImmediateU8() const;
|
||||
u16 GetImmediateU16() const;
|
||||
u32 GetImmediateU32() const;
|
||||
u64 GetImmediateU64() const;
|
||||
|
||||
/// Is this value currently in a GPR?
|
||||
bool IsInGpr() const;
|
||||
/// Is this value currently in a XMM?
|
||||
bool IsInXmm() const;
|
||||
/// Is this value currently in memory?
|
||||
bool IsInMemory() const;
|
||||
|
||||
private:
|
||||
friend class RegAlloc;
|
||||
Argument(RegAlloc& reg_alloc) : reg_alloc(reg_alloc) {}
|
||||
|
||||
bool allocated = false;
|
||||
RegAlloc& reg_alloc;
|
||||
IR::Value value;
|
||||
};
|
||||
|
||||
class RegAlloc final {
|
||||
public:
|
||||
explicit RegAlloc(BlockOfCode* code) : code(code) {}
|
||||
|
||||
/// Late-def
|
||||
Xbyak::Reg64 DefGpr(IR::Inst* def_inst, HostLocList desired_locations = any_gpr) {
|
||||
return HostLocToReg64(DefHostLocReg(def_inst, desired_locations));
|
||||
}
|
||||
Xbyak::Xmm DefXmm(IR::Inst* def_inst, HostLocList desired_locations = any_xmm) {
|
||||
return HostLocToXmm(DefHostLocReg(def_inst, desired_locations));
|
||||
}
|
||||
void RegisterAddDef(IR::Inst* def_inst, const IR::Value& use_inst);
|
||||
/// Early-use, Late-def
|
||||
Xbyak::Reg64 UseDefGpr(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations = any_gpr) {
|
||||
return HostLocToReg64(UseDefHostLocReg(use_value, def_inst, desired_locations));
|
||||
}
|
||||
Xbyak::Xmm UseDefXmm(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations = any_xmm) {
|
||||
return HostLocToXmm(UseDefHostLocReg(use_value, def_inst, desired_locations));
|
||||
}
|
||||
std::tuple<OpArg, Xbyak::Reg64> UseDefOpArgGpr(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations = any_gpr) {
|
||||
OpArg op;
|
||||
HostLoc host_loc;
|
||||
std::tie(op, host_loc) = UseDefOpArgHostLocReg(use_value, def_inst, desired_locations);
|
||||
return std::make_tuple(op, HostLocToReg64(host_loc));
|
||||
}
|
||||
std::tuple<OpArg, Xbyak::Xmm> UseDefOpArgXmm(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations = any_xmm) {
|
||||
OpArg op;
|
||||
HostLoc host_loc;
|
||||
std::tie(op, host_loc) = UseDefOpArgHostLocReg(use_value, def_inst, desired_locations);
|
||||
return std::make_tuple(op, HostLocToXmm(host_loc));
|
||||
}
|
||||
/// Early-use
|
||||
Xbyak::Reg64 UseGpr(IR::Value use_value, HostLocList desired_locations = any_gpr) {
|
||||
return HostLocToReg64(UseHostLocReg(use_value, desired_locations));
|
||||
}
|
||||
Xbyak::Xmm UseXmm(IR::Value use_value, HostLocList desired_locations = any_xmm) {
|
||||
return HostLocToXmm(UseHostLocReg(use_value, desired_locations));
|
||||
}
|
||||
OpArg UseOpArg(IR::Value use_value, HostLocList desired_locations);
|
||||
/// Early-use, Destroyed
|
||||
Xbyak::Reg64 UseScratchGpr(IR::Value use_value, HostLocList desired_locations = any_gpr) {
|
||||
return HostLocToReg64(UseScratchHostLocReg(use_value, desired_locations));
|
||||
}
|
||||
Xbyak::Xmm UseScratchXmm(IR::Value use_value, HostLocList desired_locations = any_xmm) {
|
||||
return HostLocToXmm(UseScratchHostLocReg(use_value, desired_locations));
|
||||
}
|
||||
/// Early-def, Late-use, single-use
|
||||
Xbyak::Reg64 ScratchGpr(HostLocList desired_locations = any_gpr) {
|
||||
return HostLocToReg64(ScratchHostLocReg(desired_locations));
|
||||
}
|
||||
Xbyak::Xmm ScratchXmm(HostLocList desired_locations = any_xmm) {
|
||||
return HostLocToXmm(ScratchHostLocReg(desired_locations));
|
||||
}
|
||||
std::array<Argument, 3> GetArgumentInfo(IR::Inst* inst);
|
||||
|
||||
/// Late-def for result register, Early-use for all arguments, Each value is placed into registers according to host ABI.
|
||||
void HostCall(IR::Inst* result_def = nullptr, IR::Value arg0_use = {}, IR::Value arg1_use = {}, IR::Value arg2_use = {}, IR::Value arg3_use = {});
|
||||
Xbyak::Reg64 UseGpr(Argument& arg);
|
||||
Xbyak::Xmm UseXmm(Argument& arg);
|
||||
OpArg UseOpArg(Argument& arg);
|
||||
void Use(Argument& arg, HostLoc host_loc);
|
||||
|
||||
Xbyak::Reg64 UseScratchGpr(Argument& arg);
|
||||
Xbyak::Xmm UseScratchXmm(Argument& arg);
|
||||
void UseScratch(Argument& arg, HostLoc host_loc);
|
||||
|
||||
void DefineValue(IR::Inst* inst, const Xbyak::Reg& reg);
|
||||
void DefineValue(IR::Inst* inst, Argument& arg);
|
||||
|
||||
Xbyak::Reg64 ScratchGpr(HostLocList desired_locations = any_gpr);
|
||||
Xbyak::Xmm ScratchXmm(HostLocList desired_locations = any_xmm);
|
||||
|
||||
void HostCall(IR::Inst* result_def = nullptr, boost::optional<Argument&> arg0 = {}, boost::optional<Argument&> arg1 = {}, boost::optional<Argument&> arg2 = {}, boost::optional<Argument&> arg3 = {});
|
||||
|
||||
// TODO: Values in host flags
|
||||
|
||||
|
|
@ -85,65 +101,32 @@ public:
|
|||
|
||||
void AssertNoMoreUses();
|
||||
|
||||
void Reset();
|
||||
|
||||
private:
|
||||
friend struct Argument;
|
||||
|
||||
HostLoc SelectARegister(HostLocList desired_locations) const;
|
||||
boost::optional<HostLoc> ValueLocation(const IR::Inst* value) const;
|
||||
bool IsRegisterOccupied(HostLoc loc) const;
|
||||
bool IsRegisterAllocated(HostLoc loc) const;
|
||||
bool IsLastUse(const IR::Inst* inst) const;
|
||||
|
||||
HostLoc DefHostLocReg(IR::Inst* def_inst, HostLocList desired_locations);
|
||||
HostLoc UseDefHostLocReg(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations);
|
||||
HostLoc UseDefHostLocReg(IR::Inst* use_inst, IR::Inst* def_inst, HostLocList desired_locations);
|
||||
std::tuple<OpArg, HostLoc> UseDefOpArgHostLocReg(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations);
|
||||
HostLoc UseHostLocReg(IR::Value use_value, HostLocList desired_locations);
|
||||
HostLoc UseHostLocReg(IR::Inst* use_inst, HostLocList desired_locations);
|
||||
std::tuple<HostLoc, bool> UseHostLoc(IR::Inst* use_inst, HostLocList desired_locations);
|
||||
HostLoc UseScratchHostLocReg(IR::Value use_value, HostLocList desired_locations);
|
||||
HostLoc UseScratchHostLocReg(IR::Inst* use_inst, HostLocList desired_locations);
|
||||
HostLoc ScratchHostLocReg(HostLocList desired_locations);
|
||||
HostLoc UseImpl(IR::Value use_value, HostLocList desired_locations);
|
||||
HostLoc UseScratchImpl(IR::Value use_value, HostLocList desired_locations);
|
||||
HostLoc ScratchImpl(HostLocList desired_locations);
|
||||
void DefineValueImpl(IR::Inst* def_inst, HostLoc host_loc);
|
||||
void DefineValueImpl(IR::Inst* def_inst, const IR::Value& use_inst);
|
||||
|
||||
void EmitMove(HostLoc to, HostLoc from);
|
||||
void EmitExchange(HostLoc a, HostLoc b);
|
||||
HostLoc LoadImmediateIntoHostLocReg(IR::Value imm, HostLoc reg);
|
||||
BlockOfCode* code = nullptr;
|
||||
|
||||
HostLoc LoadImmediate(IR::Value imm, HostLoc reg);
|
||||
void Move(HostLoc to, HostLoc from);
|
||||
void CopyToScratch(HostLoc to, HostLoc from);
|
||||
void Exchange(HostLoc a, HostLoc b);
|
||||
void MoveOutOfTheWay(HostLoc reg);
|
||||
|
||||
void SpillRegister(HostLoc loc);
|
||||
HostLoc FindFreeSpill() const;
|
||||
|
||||
BlockOfCode* code = nullptr;
|
||||
|
||||
struct HostLocInfo {
|
||||
std::vector<IR::Inst*> values; // early value
|
||||
IR::Inst* def = nullptr; // late value
|
||||
bool is_being_used = false;
|
||||
|
||||
bool IsIdle() const {
|
||||
return !is_being_used;
|
||||
}
|
||||
bool IsScratch() const {
|
||||
return is_being_used && !def && values.empty();
|
||||
}
|
||||
bool IsUse() const {
|
||||
return is_being_used && !def && !values.empty();
|
||||
}
|
||||
bool IsDef() const {
|
||||
return is_being_used && def && values.empty();
|
||||
}
|
||||
bool IsUseDef() const {
|
||||
return is_being_used && def && !values.empty();
|
||||
}
|
||||
};
|
||||
std::array<HostLocInfo, HostLocCount> hostloc_info;
|
||||
HostLocInfo& LocInfo(HostLoc loc) {
|
||||
DEBUG_ASSERT(loc != HostLoc::RSP && loc != HostLoc::R15);
|
||||
return hostloc_info[static_cast<size_t>(loc)];
|
||||
}
|
||||
const HostLocInfo& LocInfo(HostLoc loc) const {
|
||||
DEBUG_ASSERT(loc != HostLoc::RSP && loc != HostLoc::R15);
|
||||
return hostloc_info[static_cast<size_t>(loc)];
|
||||
}
|
||||
HostLocInfo& LocInfo(HostLoc loc);
|
||||
const HostLocInfo& LocInfo(HostLoc loc) const;
|
||||
};
|
||||
|
||||
} // namespace BackendX64
|
||||
|
|
|
|||
|
|
@ -255,13 +255,13 @@ Inst* Inst::GetAssociatedPseudoOperation(Opcode opcode) {
|
|||
// This is faster than doing a search through the block.
|
||||
switch (opcode) {
|
||||
case IR::Opcode::GetCarryFromOp:
|
||||
DEBUG_ASSERT(!carry_inst || carry_inst->GetOpcode() == Opcode::GetCarryFromOp);
|
||||
ASSERT(!carry_inst || carry_inst->GetOpcode() == Opcode::GetCarryFromOp);
|
||||
return carry_inst;
|
||||
case IR::Opcode::GetOverflowFromOp:
|
||||
DEBUG_ASSERT(!overflow_inst || overflow_inst->GetOpcode() == Opcode::GetOverflowFromOp);
|
||||
ASSERT(!overflow_inst || overflow_inst->GetOpcode() == Opcode::GetOverflowFromOp);
|
||||
return overflow_inst;
|
||||
case IR::Opcode::GetGEFromOp:
|
||||
DEBUG_ASSERT(!ge_inst || ge_inst->GetOpcode() == Opcode::GetGEFromOp);
|
||||
ASSERT(!ge_inst || ge_inst->GetOpcode() == Opcode::GetGEFromOp);
|
||||
return ge_inst;
|
||||
default:
|
||||
break;
|
||||
|
|
@ -278,15 +278,15 @@ Type Inst::GetType() const {
|
|||
}
|
||||
|
||||
Value Inst::GetArg(size_t index) const {
|
||||
DEBUG_ASSERT(index < GetNumArgsOf(op));
|
||||
DEBUG_ASSERT(!args[index].IsEmpty());
|
||||
ASSERT(index < GetNumArgsOf(op));
|
||||
ASSERT(!args[index].IsEmpty());
|
||||
|
||||
return args[index];
|
||||
}
|
||||
|
||||
void Inst::SetArg(size_t index, Value value) {
|
||||
DEBUG_ASSERT(index < GetNumArgsOf(op));
|
||||
DEBUG_ASSERT(AreTypesCompatible(value.GetType(), GetArgTypeOf(op, index)));
|
||||
ASSERT(index < GetNumArgsOf(op));
|
||||
ASSERT(AreTypesCompatible(value.GetType(), GetArgTypeOf(op, index)));
|
||||
|
||||
if (!args[index].IsImmediate()) {
|
||||
UndoUse(args[index]);
|
||||
|
|
@ -346,15 +346,15 @@ void Inst::UndoUse(const Value& value) {
|
|||
|
||||
switch (op){
|
||||
case Opcode::GetCarryFromOp:
|
||||
DEBUG_ASSERT(value.GetInst()->carry_inst->GetOpcode() == Opcode::GetCarryFromOp);
|
||||
ASSERT(value.GetInst()->carry_inst->GetOpcode() == Opcode::GetCarryFromOp);
|
||||
value.GetInst()->carry_inst = nullptr;
|
||||
break;
|
||||
case Opcode::GetOverflowFromOp:
|
||||
DEBUG_ASSERT(value.GetInst()->overflow_inst->GetOpcode() == Opcode::GetOverflowFromOp);
|
||||
ASSERT(value.GetInst()->overflow_inst->GetOpcode() == Opcode::GetOverflowFromOp);
|
||||
value.GetInst()->overflow_inst = nullptr;
|
||||
break;
|
||||
case Opcode::GetGEFromOp:
|
||||
DEBUG_ASSERT(value.GetInst()->ge_inst->GetOpcode() == Opcode::GetGEFromOp);
|
||||
ASSERT(value.GetInst()->ge_inst->GetOpcode() == Opcode::GetGEFromOp);
|
||||
value.GetInst()->ge_inst = nullptr;
|
||||
break;
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -69,59 +69,59 @@ Type Value::GetType() const {
|
|||
}
|
||||
|
||||
Arm::Reg Value::GetRegRef() const {
|
||||
DEBUG_ASSERT(type == Type::RegRef);
|
||||
ASSERT(type == Type::RegRef);
|
||||
return inner.imm_regref;
|
||||
}
|
||||
|
||||
Arm::ExtReg Value::GetExtRegRef() const {
|
||||
DEBUG_ASSERT(type == Type::ExtRegRef);
|
||||
ASSERT(type == Type::ExtRegRef);
|
||||
return inner.imm_extregref;
|
||||
}
|
||||
|
||||
Inst* Value::GetInst() const {
|
||||
DEBUG_ASSERT(type == Type::Opaque);
|
||||
ASSERT(type == Type::Opaque);
|
||||
return inner.inst;
|
||||
}
|
||||
|
||||
bool Value::GetU1() const {
|
||||
if (type == Type::Opaque && inner.inst->GetOpcode() == Opcode::Identity)
|
||||
return inner.inst->GetArg(0).GetU1();
|
||||
DEBUG_ASSERT(type == Type::U1);
|
||||
ASSERT(type == Type::U1);
|
||||
return inner.imm_u1;
|
||||
}
|
||||
|
||||
u8 Value::GetU8() const {
|
||||
if (type == Type::Opaque && inner.inst->GetOpcode() == Opcode::Identity)
|
||||
return inner.inst->GetArg(0).GetU8();
|
||||
DEBUG_ASSERT(type == Type::U8);
|
||||
ASSERT(type == Type::U8);
|
||||
return inner.imm_u8;
|
||||
}
|
||||
|
||||
u16 Value::GetU16() const {
|
||||
if (type == Type::Opaque && inner.inst->GetOpcode() == Opcode::Identity)
|
||||
return inner.inst->GetArg(0).GetU16();
|
||||
DEBUG_ASSERT(type == Type::U16);
|
||||
ASSERT(type == Type::U16);
|
||||
return inner.imm_u16;
|
||||
}
|
||||
|
||||
u32 Value::GetU32() const {
|
||||
if (type == Type::Opaque && inner.inst->GetOpcode() == Opcode::Identity)
|
||||
return inner.inst->GetArg(0).GetU32();
|
||||
DEBUG_ASSERT(type == Type::U32);
|
||||
ASSERT(type == Type::U32);
|
||||
return inner.imm_u32;
|
||||
}
|
||||
|
||||
u64 Value::GetU64() const {
|
||||
if (type == Type::Opaque && inner.inst->GetOpcode() == Opcode::Identity)
|
||||
return inner.inst->GetArg(0).GetU64();
|
||||
DEBUG_ASSERT(type == Type::U64);
|
||||
ASSERT(type == Type::U64);
|
||||
return inner.imm_u64;
|
||||
}
|
||||
|
||||
std::array<u8, 8> Value::GetCoprocInfo() const {
|
||||
if (type == Type::Opaque && inner.inst->GetOpcode() == Opcode::Identity)
|
||||
return inner.inst->GetArg(0).GetCoprocInfo();
|
||||
DEBUG_ASSERT(type == Type::CoprocInfo);
|
||||
ASSERT(type == Type::CoprocInfo);
|
||||
return inner.imm_coproc;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue