From 59a8e14d1ced5968442f8f0b704e7869b750133f Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Fri, 26 Aug 2016 15:23:38 +0100
Subject: [PATCH] reg_alloc: Correct OpArg::setBit for Reg

---
 src/backend_x64/reg_alloc.cpp |  3 ++-
 src/backend_x64/reg_alloc.h   | 24 +++++++++++++++++++++++-
 tests/arm/fuzz_thumb.cpp      |  2 +-
 3 files changed, 26 insertions(+), 3 deletions(-)

diff --git a/src/backend_x64/reg_alloc.cpp b/src/backend_x64/reg_alloc.cpp
index 11824628..f38044d3 100644
--- a/src/backend_x64/reg_alloc.cpp
+++ b/src/backend_x64/reg_alloc.cpp
@@ -191,7 +191,8 @@ HostLoc RegAlloc::UseHostLocReg(IR::Inst* use_inst, HostLocList desired_location
 
 OpArg RegAlloc::UseOpArg(IR::Value use_value, HostLocList desired_locations) {
     if (use_value.IsImmediate()) {
-        return Xbyak::Operand(); // return a None
+        ASSERT_MSG(false, "UseOpArg does not support immediates");
+        return {}; // return a None
     }
 
     IR::Inst* use_inst = use_value.GetInst();
diff --git a/src/backend_x64/reg_alloc.h b/src/backend_x64/reg_alloc.h
index 9123e7c1..b09001e1 100644
--- a/src/backend_x64/reg_alloc.h
+++ b/src/backend_x64/reg_alloc.h
@@ -26,7 +26,7 @@ namespace BackendX64 {
 struct OpArg {
     OpArg() : type(OPERAND), inner_operand() {}
     OpArg(const Xbyak::Address& address) : type(ADDRESS), inner_address(address) {}
-    OpArg(const Xbyak::Operand& operand) : type(OPERAND), inner_operand(operand) {}
+    OpArg(const Xbyak::Reg& reg) : type(REG), inner_reg(reg) {}
 
     Xbyak::Operand& operator*() {
         switch (type) {
@@ -34,6 +34,8 @@ struct OpArg {
             return inner_address;
         case OPERAND:
             return inner_operand;
+        case REG:
+            return inner_reg;
         }
         ASSERT_MSG(false, "Unreachable");
     }
@@ -46,6 +48,24 @@ struct OpArg {
         case OPERAND:
             inner_operand.setBit(bits);
             return;
+        case REG:
+            switch (bits) {
+            case 8:
+                inner_reg = inner_reg.cvt8();
+                return;
+            case 16:
+                inner_reg = inner_reg.cvt16();
+                return;
+            case 32:
+                inner_reg = inner_reg.cvt32();
+                return;
+            case 64:
+                inner_reg = inner_reg.cvt64();
+                return;
+            default:
+                ASSERT_MSG(false, "Invalid bits");
+                return;
+            }
         }
         ASSERT_MSG(false, "Unreachable");
     }
@@ -54,11 +74,13 @@ private:
     enum {
         OPERAND,
         ADDRESS,
+        REG,
     } type;
 
     union {
         Xbyak::Operand inner_operand;
         Xbyak::Address inner_address;
+        Xbyak::Reg inner_reg;
     };
 };
 
diff --git a/tests/arm/fuzz_thumb.cpp b/tests/arm/fuzz_thumb.cpp
index 111ca414..df07df54 100644
--- a/tests/arm/fuzz_thumb.cpp
+++ b/tests/arm/fuzz_thumb.cpp
@@ -308,7 +308,7 @@ TEST_CASE("Fuzz Thumb instructions set 1", "[JitX64][Thumb]") {
     }
 
     SECTION("long blocks") {
-        FuzzJitThumb(1024, 1025, 10, instruction_select);
+        FuzzJitThumb(1024, 1025, 1000, instruction_select);
     }
 }