emit_x64_vector_saturation: AVX512 implementation of EmitVectorSignedSaturated
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1 changed files with 47 additions and 2 deletions
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@ -62,11 +62,56 @@ void EmitVectorSignedSaturated(BlockOfCode& code, EmitContext& ctx, IR::Inst* in
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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// TODO AVX-512: vpternlog, vpsraq
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code.movaps(tmp, result);
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if (code.HasHostFeature(HostFeature::AVX512_Ortho | HostFeature::AVX512DQ)) {
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// Do a regular unsigned operation
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if constexpr (op == Op::Add) {
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if constexpr (esize == 32) {
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code.vpaddd(result, result, arg);
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} else {
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code.vpaddq(result, result, arg);
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}
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} else {
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if constexpr (esize == 32) {
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code.vpsubd(result, result, arg);
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} else {
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code.vpsubq(result, result, arg);
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}
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}
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// Determine if an overflow/underflow happened
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if constexpr (op == Op::Add) {
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code.vpternlogd(tmp, result, arg, 0b00100100);
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} else {
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code.vpternlogd(tmp, result, arg, 0b00011000);
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}
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// Masked write
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if constexpr (esize == 32) {
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code.vpmovd2m(k1, tmp);
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code.vpsrad(result | k1, result, 31);
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code.vpxord(result | k1, result, code.MConst(xword_b, msb_mask, msb_mask));
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} else {
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code.vpmovq2m(k1, tmp);
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code.vpsraq(result | k1, result, 63);
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code.vpxorq(result | k1, result, code.MConst(xword_b, msb_mask, msb_mask));
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}
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// Set ZF if an overflow happened
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code.ktestb(k1, k1);
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// Write Q if overflow/underflow occured
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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ctx.reg_alloc.DefineValue(inst, result);
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return;
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}
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// TODO AVX2 implementation
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// TODO AVX2 implementation
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code.movaps(xmm0, result);
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code.movaps(xmm0, result);
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code.movaps(tmp, result);
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if constexpr (op == Op::Add) {
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if constexpr (op == Op::Add) {
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if constexpr (esize == 32) {
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if constexpr (esize == 32) {
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