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backend/x64: Change V flag testing to cmp instead of add

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Prefer a non-destructive read to a destructive read.
This commit is contained in:
MerryMage 2021-04-25 23:19:32 +01:00
parent f35d98c923
commit 510862e50c
2 changed files with 12 additions and 12 deletions
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12
src/backend/x64/emit_x64.cpp
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@ -219,11 +219,11 @@ Xbyak::Label EmitX64::EmitCond(IR::Cond cond) {
code.jns(pass);
break;
case IR::Cond::VS: //v
code.add(al, 0x7F);
code.cmp(al, 0x81);
code.jo(pass);
break;
case IR::Cond::VC: //!v
code.add(al, 0x7F);
code.cmp(al, 0x81);
code.jno(pass);
break;
case IR::Cond::HI: //c & !z
@ -237,22 +237,22 @@ Xbyak::Label EmitX64::EmitCond(IR::Cond cond) {
code.jna(pass);
break;
case IR::Cond::GE: // n == v
code.add(al, 0x7F);
code.cmp(al, 0x81);
code.sahf();
code.jge(pass);
break;
case IR::Cond::LT: // n != v
code.add(al, 0x7F);
code.cmp(al, 0x81);
code.sahf();
code.jl(pass);
break;
case IR::Cond::GT: // !z & (n == v)
code.add(al, 0x7F);
code.cmp(al, 0x81);
code.sahf();
code.jg(pass);
break;
case IR::Cond::LE: // z | (n != v)
code.add(al, 0x7F);
code.cmp(al, 0x81);
code.sahf();
code.jle(pass);
break;

12
src/backend/x64/emit_x64_data_processing.cpp
View file

@ -171,11 +171,11 @@ static void EmitConditionalSelect(BlockOfCode& code, EmitContext& ctx, IR::Inst*
code.cmovns(else_, then_);
break;
case IR::Cond::VS: //v
code.add(nzcv.cvt8(), 0x7F);
code.cmp(nzcv.cvt8(), 0x81);
code.cmovo(else_, then_);
break;
case IR::Cond::VC: //!v
code.add(nzcv.cvt8(), 0x7F);
code.cmp(nzcv.cvt8(), 0x81);
code.cmovno(else_, then_);
break;
case IR::Cond::HI: //c & !z
@ -189,22 +189,22 @@ static void EmitConditionalSelect(BlockOfCode& code, EmitContext& ctx, IR::Inst*
code.cmovna(else_, then_);
break;
case IR::Cond::GE: // n == v
code.add(nzcv.cvt8(), 0x7F);
code.cmp(nzcv.cvt8(), 0x81);
code.sahf();
code.cmovge(else_, then_);
break;
case IR::Cond::LT: // n != v
code.add(nzcv.cvt8(), 0x7F);
code.cmp(nzcv.cvt8(), 0x81);
code.sahf();
code.cmovl(else_, then_);
break;
case IR::Cond::GT: // !z & (n == v)
code.add(nzcv.cvt8(), 0x7F);
code.cmp(nzcv.cvt8(), 0x81);
code.sahf();
code.cmovg(else_, then_);
break;
case IR::Cond::LE: // z | (n != v)
code.add(nzcv.cvt8(), 0x7F);
code.cmp(nzcv.cvt8(), 0x81);
code.sahf();
code.cmovle(else_, then_);
break;