diff --git a/src/dynarmic/backend/arm64/a32_interface.cpp b/src/dynarmic/backend/arm64/a32_interface.cpp index 23753371..6b38c410 100644 --- a/src/dynarmic/backend/arm64/a32_interface.cpp +++ b/src/dynarmic/backend/arm64/a32_interface.cpp @@ -16,64 +16,11 @@ #include "dynarmic/backend/arm64/a32_jitstate.h" #include "dynarmic/common/atomic.h" #include "dynarmic/interface/A32/a32.h" -#include "dynarmic/interface/A32/context.h" namespace Dynarmic::A32 { using namespace Backend::Arm64; -struct Context::Impl { - A32JitState state; -}; - -Context::Context() - : impl(std::make_unique()) {} - -Context::~Context() = default; - -Context::Context(const Context& ctx) - : impl(std::make_unique(*ctx.impl)) {} - -Context::Context(Context&& ctx) noexcept - : impl(std::move(ctx.impl)) {} - -Context& Context::operator=(const Context& ctx) { - *impl = *ctx.impl; - return *this; -} - -Context& Context::operator=(Context&& ctx) noexcept { - impl = std::move(ctx.impl); - return *this; -} - -std::array& Context::Regs() { - return impl->state.regs; -} -const std::array& Context::Regs() const { - return impl->state.regs; -} -std::array& Context::ExtRegs() { - return impl->state.ext_regs; -} -const std::array& Context::ExtRegs() const { - return impl->state.ext_regs; -} - -std::uint32_t Context::Cpsr() const { - return impl->state.Cpsr(); -} -void Context::SetCpsr(std::uint32_t value) { - impl->state.SetCpsr(value); -} - -std::uint32_t Context::Fpscr() const { - return impl->state.Fpscr(); -} -void Context::SetFpscr(std::uint32_t value) { - return impl->state.SetFpscr(value); -} - struct Jit::Impl final { Impl(Jit* jit_interface, A32::UserConfig conf) : jit_interface(jit_interface) @@ -171,20 +118,6 @@ struct Jit::Impl final { current_state.SetFpscr(value); } - Context SaveContext() const { - Context ctx; - ctx.impl->state = current_state; - return ctx; - } - - void SaveContext(Context& ctx) const { - ctx.impl->state = current_state; - } - - void LoadContext(const Context& ctx) { - current_state = ctx.impl->state; - } - void ClearExclusiveState() { current_state.exclusive_state = false; } @@ -295,18 +228,6 @@ void Jit::SetFpscr(std::uint32_t value) { impl->SetFpscr(value); } -Context Jit::SaveContext() const { - return impl->SaveContext(); -} - -void Jit::SaveContext(Context& ctx) const { - impl->SaveContext(ctx); -} - -void Jit::LoadContext(const Context& ctx) { - impl->LoadContext(ctx); -} - void Jit::ClearExclusiveState() { impl->ClearExclusiveState(); } diff --git a/src/dynarmic/backend/x64/a32_interface.cpp b/src/dynarmic/backend/x64/a32_interface.cpp index 37b17a51..4193e22e 100644 --- a/src/dynarmic/backend/x64/a32_interface.cpp +++ b/src/dynarmic/backend/x64/a32_interface.cpp @@ -23,7 +23,6 @@ #include "dynarmic/common/x64_disassemble.h" #include "dynarmic/frontend/A32/translate/a32_translate.h" #include "dynarmic/interface/A32/a32.h" -#include "dynarmic/interface/A32/context.h" #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/location_descriptor.h" #include "dynarmic/ir/opt/passes.h" @@ -75,7 +74,6 @@ struct Jit::Impl { const A32::UserConfig conf; // Requests made during execution to invalidate the cache are queued up here. - size_t invalid_cache_generation = 0; boost::icl::interval_set invalid_cache_ranges; bool invalidate_entire_cache = false; @@ -118,7 +116,6 @@ struct Jit::Impl { invalid_cache_ranges.clear(); invalidate_entire_cache = false; - invalid_cache_generation++; return; } @@ -129,7 +126,6 @@ struct Jit::Impl { jit_state.ResetRSB(); emitter.InvalidateCacheRanges(invalid_cache_ranges); invalid_cache_ranges.clear(); - invalid_cache_generation++; } void RequestCacheInvalidation() { @@ -281,72 +277,6 @@ void Jit::SetFpscr(u32 value) { return impl->jit_state.SetFpscr(value); } -Context Jit::SaveContext() const { - Context ctx; - SaveContext(ctx); - return ctx; -} - -struct Context::Impl { - A32JitState jit_state; - size_t invalid_cache_generation; -}; - -Context::Context() - : impl(std::make_unique()) { - impl->jit_state.ResetRSB(); -} -Context::~Context() = default; -Context::Context(const Context& ctx) - : impl(std::make_unique(*ctx.impl)) {} -Context::Context(Context&& ctx) noexcept - : impl(std::move(ctx.impl)) {} -Context& Context::operator=(const Context& ctx) { - *impl = *ctx.impl; - return *this; -} -Context& Context::operator=(Context&& ctx) noexcept { - impl = std::move(ctx.impl); - return *this; -} - -std::array& Context::Regs() { - return impl->jit_state.Reg; -} -const std::array& Context::Regs() const { - return impl->jit_state.Reg; -} -std::array& Context::ExtRegs() { - return impl->jit_state.ExtReg; -} -const std::array& Context::ExtRegs() const { - return impl->jit_state.ExtReg; -} - -std::uint32_t Context::Cpsr() const { - return impl->jit_state.Cpsr(); -} -void Context::SetCpsr(std::uint32_t value) { - impl->jit_state.SetCpsr(value); -} - -std::uint32_t Context::Fpscr() const { - return impl->jit_state.Fpscr(); -} -void Context::SetFpscr(std::uint32_t value) { - return impl->jit_state.SetFpscr(value); -} - -void Jit::SaveContext(Context& ctx) const { - ctx.impl->jit_state.TransferJitState(impl->jit_state, false); - ctx.impl->invalid_cache_generation = impl->invalid_cache_generation; -} - -void Jit::LoadContext(const Context& ctx) { - bool reset_rsb = ctx.impl->invalid_cache_generation != impl->invalid_cache_generation; - impl->jit_state.TransferJitState(ctx.impl->jit_state, reset_rsb); -} - void Jit::DumpDisassembly() const { const size_t size = reinterpret_cast(impl->block_of_code.getCurr()) - reinterpret_cast(impl->block_of_code.GetCodeBegin()); Common::DumpDisassembledX64(impl->block_of_code.GetCodeBegin(), size); diff --git a/src/dynarmic/interface/A32/a32.h b/src/dynarmic/interface/A32/a32.h index e65d1a3a..e1c5b40f 100644 --- a/src/dynarmic/interface/A32/a32.h +++ b/src/dynarmic/interface/A32/a32.h @@ -17,8 +17,6 @@ namespace Dynarmic { namespace A32 { -struct Context; - class Jit final { public: explicit Jit(UserConfig conf); @@ -80,10 +78,6 @@ public: std::uint32_t Fpscr() const; void SetFpscr(std::uint32_t value); - Context SaveContext() const; - void SaveContext(Context&) const; - void LoadContext(const Context&); - /// Clears exclusive state for this core. void ClearExclusiveState(); diff --git a/src/dynarmic/interface/A32/context.h b/src/dynarmic/interface/A32/context.h deleted file mode 100644 index 74876b1b..00000000 --- a/src/dynarmic/interface/A32/context.h +++ /dev/null @@ -1,45 +0,0 @@ -/* This file is part of the dynarmic project. - * Copyright (c) 2016 MerryMage - * SPDX-License-Identifier: 0BSD - */ - -#pragma once - -#include -#include -#include - -namespace Dynarmic { -namespace A32 { - -struct Context { -public: - Context(); - ~Context(); - Context(const Context&); - Context(Context&&) noexcept; - Context& operator=(const Context&); - Context& operator=(Context&&) noexcept; - - /// View and modify registers. - std::array& Regs(); - const std::array& Regs() const; - std::array& ExtRegs(); - const std::array& ExtRegs() const; - - /// View and modify CPSR. - std::uint32_t Cpsr() const; - void SetCpsr(std::uint32_t value); - - /// View and modify FPSCR. - std::uint32_t Fpscr() const; - void SetFpscr(std::uint32_t value); - -private: - friend class Jit; - struct Impl; - std::unique_ptr impl; -}; - -} // namespace A32 -} // namespace Dynarmic diff --git a/src/dynarmic/interface/A64/a64.h b/src/dynarmic/interface/A64/a64.h index f2c7055b..a150da84 100644 --- a/src/dynarmic/interface/A64/a64.h +++ b/src/dynarmic/interface/A64/a64.h @@ -18,8 +18,6 @@ namespace Dynarmic { namespace A64 { -struct Context; - class Jit final { public: explicit Jit(UserConfig conf);