A64: Remove NaN accuracy setting
Always do accuracte NaN handling.
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b5df8d1ef8
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46445d0866
6 changed files with 8 additions and 28 deletions
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@ -209,18 +209,6 @@ struct UserConfig {
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/// This enables the fast dispatcher.
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bool enable_fast_dispatch = true;
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// The below options relate to accuracy of floating-point emulation.
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/// Determines how accurate NaN handling is.
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enum class NaNAccuracy {
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/// Results of operations with NaNs will exactly match hardware.
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Accurate,
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/// Behave as if FPCR.DN is always set.
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AlwaysForceDefaultNaN,
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/// No special handling of NaN, other than setting default NaN when FPCR.DN is set.
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NoChecks,
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} floating_point_nan_accuracy = NaNAccuracy::Accurate;
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// Determines whether AddTicks and GetTicksRemaining are called.
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// If false, execution will continue until soon after Jit::HaltExecution is called.
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// bool enable_ticks = true; // TODO
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@ -52,10 +52,6 @@ FP::FPCR A64EmitContext::FPCR(bool fpcr_controlled) const {
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return fpcr_controlled ? Location().FPCR() : Location().FPCR().ASIMDStandardValue();
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}
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bool A64EmitContext::AccurateNaN() const {
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return conf.floating_point_nan_accuracy == A64::UserConfig::NaNAccuracy::Accurate;
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}
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A64EmitX64::A64EmitX64(BlockOfCode& code, A64::UserConfig conf, A64::Jit* jit_interface)
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: EmitX64(code), conf(conf), jit_interface{jit_interface} {
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GenMemory128Accessors();
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@ -28,7 +28,6 @@ struct A64EmitContext final : public EmitContext {
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A64::LocationDescriptor Location() const;
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bool IsSingleStep() const;
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FP::FPCR FPCR(bool fpcr_controlled = true) const override;
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bool AccurateNaN() const override;
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const A64::UserConfig& conf;
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};
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@ -50,7 +50,6 @@ struct EmitContext {
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void EraseInstruction(IR::Inst* inst);
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virtual FP::FPCR FPCR(bool fpcr_controlled = true) const = 0;
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virtual bool AccurateNaN() const { return true; }
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RegAlloc& reg_alloc;
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IR::Block& block;
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@ -258,7 +258,7 @@ void FPTwoOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
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Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
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if (ctx.AccurateNaN() && !ctx.FPCR().DN()) {
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if (!ctx.FPCR().DN()) {
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end = ProcessNaN<fsize>(code, result);
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}
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if constexpr (std::is_member_function_pointer_v<Function>) {
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@ -268,7 +268,7 @@ void FPTwoOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
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}
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if (ctx.FPCR().DN()) {
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ForceToDefaultNaN<fsize>(code, result);
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} else if (ctx.AccurateNaN()) {
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} else {
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PostProcessNaN<fsize>(code, result, ctx.reg_alloc.ScratchXmm());
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}
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code.L(end);
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@ -282,7 +282,7 @@ void FPThreeOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn)
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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if (ctx.FPCR().DN() || !ctx.AccurateNaN()) {
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if (ctx.FPCR().DN()) {
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const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm operand = ctx.reg_alloc.UseScratchXmm(args[1]);
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@ -292,9 +292,7 @@ void FPThreeOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn)
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fn(result, operand);
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}
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if (ctx.AccurateNaN()) {
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ForceToDefaultNaN<fsize>(code, result);
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}
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ctx.reg_alloc.DefineValue(inst, result);
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return;
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@ -437,7 +435,7 @@ static void EmitFPMinMax(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
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code.jmp(end);
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code.L(nan);
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if (ctx.FPCR().DN() || !ctx.AccurateNaN()) {
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if (ctx.FPCR().DN()) {
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code.movaps(result, code.MConst(xword, fsize == 32 ? f32_nan : f64_nan));
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code.jmp(end);
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} else {
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@ -677,7 +675,7 @@ static void EmitFPMulX(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const bool do_default_nan = ctx.FPCR().DN() || !ctx.AccurateNaN();
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const bool do_default_nan = ctx.FPCR().DN();
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const Xbyak::Xmm op1 = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm op2 = ctx.reg_alloc.UseXmm(args[1]);
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@ -284,7 +284,7 @@ void EmitTwoOpVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* ins
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const bool fpcr_controlled = args[fpcr_controlled_arg_index].GetImmediateU1();
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if (!ctx.AccurateNaN() || ctx.FPCR(fpcr_controlled).DN()) {
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if (ctx.FPCR(fpcr_controlled).DN()) {
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Xbyak::Xmm result;
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if constexpr (std::is_member_function_pointer_v<Function>) {
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@ -336,7 +336,7 @@ void EmitThreeOpVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* i
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const bool fpcr_controlled = args[2].GetImmediateU1();
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if (!ctx.AccurateNaN() || ctx.FPCR(fpcr_controlled).DN()) {
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if (ctx.FPCR(fpcr_controlled).DN()) {
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const Xbyak::Xmm xmm_a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm xmm_b = ctx.reg_alloc.UseXmm(args[1]);
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