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Implement thumb1_CMN_reg

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This commit is contained in:
MerryMage 2016-07-10 08:55:56 +08:00
parent 641dbf8eb4
commit 3fe46d2c6f
3 changed files with 15 additions and 2 deletions
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4
src/frontend/decoder/thumb1.h
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@ -56,7 +56,7 @@ private:
};
template <typename V>
static const std::array<Thumb1Matcher<V>, 24> g_thumb1_instruction_table {{
static const std::array<Thumb1Matcher<V>, 25> g_thumb1_instruction_table {{
#define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring)
@ -85,7 +85,7 @@ static const std::array<Thumb1Matcher<V>, 24> g_thumb1_instruction_table {{
{ INST(&V::thumb1_TST_reg, "TST (reg)", "0100001000mmmnnn") },
{ INST(&V::thumb1_RSB_imm, "RSB (imm)", "0100001001nnnddd") },
{ INST(&V::thumb1_CMP_reg, "CMP (reg)", "0100001010mmmnnn") },
//{ INST(&V::thumb1_CMN_rr, "CMN (rr)", "0100001011mmmnnn") },
{ INST(&V::thumb1_CMN_reg, "CMN (reg)", "0100001011mmmnnn") },
//{ INST(&V::thumb1_ORRS_rr, "ORRS (rr)", "0100001100mmmddd") },
//{ INST(&V::thumb1_MULS_rr, "MULS (rr)", "0100001101mmmddd") },
//{ INST(&V::thumb1_BICS_rr, "BICS (rr)", "0100001110mmmddd") },

4
src/frontend/disassembler_thumb.cpp
View file

@ -191,6 +191,10 @@ public:
return Common::StringFromFormat("cmp %s, %s", RegStr(n), RegStr(m));
}
std::string thumb1_CMN_reg(Reg m, Reg n) {
return Common::StringFromFormat("cmn %s, %s", RegStr(n), RegStr(m));
}
std::string thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;
return Common::StringFromFormat("add %s, %s", RegStr(d_n), RegStr(m));

9
src/frontend/translate_thumb.cpp
View file

@ -278,6 +278,15 @@ struct TranslatorVisitor final {
ir.SetVFlag(result.overflow);
return true;
}
bool thumb1_CMN_reg(Reg m, Reg n) {
// CMN <Rn>, <Rm>
auto result = ir.AddWithCarry(ir.GetRegister(n), ir.GetRegister(m), ir.Imm1(0));
ir.SetNFlag(ir.MostSignificantBit(result.result));
ir.SetZFlag(ir.IsZero(result.result));
ir.SetCFlag(result.carry);
ir.SetVFlag(result.overflow);
return true;
}
bool thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;