tests/fuzz_thumb: Change how test instructions are generated (Introduce InstructionGenerator struct)
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1 changed files with 58 additions and 63 deletions
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@ -8,6 +8,7 @@
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#include <cstring>
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#include <cstring>
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#include <catch.hpp>
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#include <catch.hpp>
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#include <common/bit_util.h>
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "frontend/disassembler.h"
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#include "frontend/disassembler.h"
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@ -66,28 +67,40 @@ static Dynarmic::UserCallbacks GetUserCallbacks() {
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return user_callbacks;
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return user_callbacks;
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}
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}
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static std::pair<u16, u16> FromBitString16(const char* str) {
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struct InstructionGenerator final {
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REQUIRE(strlen(str) == 16);
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public:
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InstructionGenerator(const char* format, std::function<bool(u16)> is_valid = [](u16){ return true; }) : is_valid(is_valid) {
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REQUIRE(strlen(format) == 16);
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u16 bits = 0;
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for (int i = 0; i < 16; i++) {
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u16 mask = 0;
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const u16 bit = 1 << (15 - i);
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for (int i = 0; i < 16; i++) {
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switch (format[i]) {
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const u16 bit = 1 << (15 - i);
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case '0':
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switch (str[i]) {
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mask |= bit;
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case '0':
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break;
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mask |= bit;
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case '1':
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break;
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bits |= bit;
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case '1':
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mask |= bit;
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bits |= bit;
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break;
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mask |= bit;
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default:
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break;
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// Do nothing
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default:
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break;
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// Do nothing
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}
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break;
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}
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}
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}
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}
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return { bits, mask };
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u16 Generate() const {
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}
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u16 inst;
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do {
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u16 random = RandInt<u16>(0, 0xFFFF);
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inst = bits | (random & ~mask);
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} while (!is_valid(inst));
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return inst;
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}
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private:
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u16 bits = 0;
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u16 mask = 0;
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std::function<bool(u16)> is_valid;
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};
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static bool DoesBehaviorMatch(const ARMul_State& interp, const Dynarmic::Jit& jit) {
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static bool DoesBehaviorMatch(const ARMul_State& interp, const Dynarmic::Jit& jit) {
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const auto interp_regs = interp.Reg;
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const auto interp_regs = interp.Reg;
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@ -158,55 +171,37 @@ void FuzzJitThumb(const size_t instruction_count, const size_t instructions_to_e
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}
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}
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TEST_CASE("Fuzz Thumb instructions set 1", "[JitX64][Thumb]") {
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TEST_CASE("Fuzz Thumb instructions set 1", "[JitX64][Thumb]") {
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const std::array<std::pair<u16, u16>, 16> instructions = {{
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const std::array<InstructionGenerator, 16> instructions = {{
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FromBitString16("00000xxxxxxxxxxx"), // LSL <Rd>, <Rm>, #<imm5>
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InstructionGenerator("00000xxxxxxxxxxx"), // LSL <Rd>, <Rm>, #<imm5>
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FromBitString16("00001xxxxxxxxxxx"), // LSR <Rd>, <Rm>, #<imm5>
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InstructionGenerator("00001xxxxxxxxxxx"), // LSR <Rd>, <Rm>, #<imm5>
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FromBitString16("00010xxxxxxxxxxx"), // ASR <Rd>, <Rm>, #<imm5>
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InstructionGenerator("00010xxxxxxxxxxx"), // ASR <Rd>, <Rm>, #<imm5>
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FromBitString16("000110oxxxxxxxxx"), // ADD/SUB_reg
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InstructionGenerator("000110oxxxxxxxxx"), // ADD/SUB_reg
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FromBitString16("000111oxxxxxxxxx"), // ADD/SUB_imm
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InstructionGenerator("000111oxxxxxxxxx"), // ADD/SUB_imm
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FromBitString16("001ooxxxxxxxxxxx"), // ADD/SUB/CMP/MOV_imm
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InstructionGenerator("001ooxxxxxxxxxxx"), // ADD/SUB/CMP/MOV_imm
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FromBitString16("010000ooooxxxxxx"), // Data Processing
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InstructionGenerator("010000ooooxxxxxx"), // Data Processing
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FromBitString16("010001000hxxxxxx"), // ADD (high registers)
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InstructionGenerator("010001000hxxxxxx"), // ADD (high registers)
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FromBitString16("010001010hxxxxxx"), // CMP (high registers)
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InstructionGenerator("0100010101xxxxxx"), // CMP (high registers)
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FromBitString16("01000101h0xxxxxx"), // CMP (high registers)
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InstructionGenerator("0100010110xxxxxx"), // CMP (high registers)
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FromBitString16("010001100hxxxxxx"), // MOV (high registers)
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InstructionGenerator("010001100hxxxxxx"), // MOV (high registers)
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FromBitString16("10110000oxxxxxxx"), // Adjust stack pointer
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InstructionGenerator("10110000oxxxxxxx"), // Adjust stack pointer
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FromBitString16("10110010ooxxxxxx"), // SXT/UXT
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InstructionGenerator("10110010ooxxxxxx"), // SXT/UXT
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FromBitString16("1011101000xxxxxx"), // REV
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InstructionGenerator("1011101000xxxxxx"), // REV
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FromBitString16("1011101001xxxxxx"), // REV16
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InstructionGenerator("1011101001xxxxxx"), // REV16
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FromBitString16("1011101011xxxxxx"), // REVSH
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InstructionGenerator("1011101011xxxxxx"), // REVSH
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//FromBitString16("01001xxxxxxxxxxx"), // LDR Rd, [PC, #]
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//InstructionGenerator("01001xxxxxxxxxxx"), // LDR Rd, [PC, #]
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//FromBitString16("0101oooxxxxxxxxx"), // LDR/STR Rd, [Rn, Rm]
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//InstructionGenerator("0101oooxxxxxxxxx"), // LDR/STR Rd, [Rn, Rm]
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//FromBitString16("011xxxxxxxxxxxxx"), // LDR(B)/STR(B) Rd, [Rn, #]
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//InstructionGenerator("011xxxxxxxxxxxxx"), // LDR(B)/STR(B) Rd, [Rn, #]
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//FromBitString16("1000xxxxxxxxxxxx"), // LDRH/STRH Rd, [Rn, #offset]
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//InstructionGenerator("1000xxxxxxxxxxxx"), // LDRH/STRH Rd, [Rn, #offset]
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//FromBitString16("1001xxxxxxxxxxxx"), // LDR/STR Rd, [SP, #]
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//InstructionGenerator("1001xxxxxxxxxxxx"), // LDR/STR Rd, [SP, #]
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//FromBitString16("1011x100xxxxxxxx"), // PUSH/POP (R = 0)
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//InstructionGenerator("1011x100xxxxxxxx"), // PUSH/POP (R = 0)
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//FromBitString16("1100xxxxxxxxxxxx"), // STMIA/LDMIA
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//InstructionGenerator("1100xxxxxxxxxxxx"), // STMIA/LDMIA
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//FromBitString16("101101100101x000"), // SETEND
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//InstructionGenerator("101101100101x000"), // SETEND
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}};
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}};
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auto instruction_select = [&]() -> u16 {
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auto instruction_select = [&]() -> u16 {
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size_t inst_index = RandInt<size_t>(0, instructions.size() - 1);
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size_t inst_index = RandInt<size_t>(0, instructions.size() - 1);
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if (inst_index == 22) {
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return instructions[inst_index].Generate();
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u16 L = RandInt<u16>(0, 1);
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u16 Rn = RandInt<u16>(0, 7);
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u16 reg_list = RandInt<u16>(1, 0xFF);
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if (!L && (reg_list & (1 << Rn))) {
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reg_list &= ~((1 << Rn) - 1);
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if (reg_list == 0) reg_list = 0x80;
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}
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u16 random = (L << 11) | (Rn << 8) | reg_list;
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return instructions[inst_index].first | (random &~instructions[inst_index].second);
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} else if (inst_index == 21) {
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u16 L = RandInt<u16>(0, 1);
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u16 reg_list = RandInt<u16>(1, 0xFF);
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u16 random = (L << 11) | reg_list;
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return instructions[inst_index].first | (random &~instructions[inst_index].second);
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} else {
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u16 random = RandInt<u16>(0, 0xFFFF);
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return instructions[inst_index].first | (random &~instructions[inst_index].second);
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}
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};
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};
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SECTION("short blocks") {
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SECTION("short blocks") {
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