From 3eed024caf139f1f1b2dfab84debc6325bc6d29a Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Sat, 27 Jun 2020 22:30:26 +0100
Subject: [PATCH] asimd_three_same: Ignore Q=1 for VPADD (floating-point)

---
 src/frontend/A32/translate/impl/asimd_three_regs.cpp | 8 +++++---
 tests/A32/fuzz_arm.cpp                               | 2 --
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/frontend/A32/translate/impl/asimd_three_regs.cpp b/src/frontend/A32/translate/impl/asimd_three_regs.cpp
index 39055533..38cbc94a 100644
--- a/src/frontend/A32/translate/impl/asimd_three_regs.cpp
+++ b/src/frontend/A32/translate/impl/asimd_three_regs.cpp
@@ -710,9 +710,11 @@ bool ArmTranslatorVisitor::asimd_VSUB_float(bool D, bool sz, size_t Vn, size_t V
 }
 
 bool ArmTranslatorVisitor::asimd_VPADD_float(bool D, bool sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) {
-    return FloatingPointInstruction(*this, D, sz, Vn, Vd, N, Q, M, Vm, [this, Q](const auto&, const auto& reg_n, const auto& reg_m) {
-        return Q ? ir.FPVectorPairedAdd(32, reg_n, reg_m, false)
-                 : ir.FPVectorPairedAddLower(32, reg_n, reg_m, false);
+    if (Q) {
+        return UndefinedInstruction();
+    }
+    return FloatingPointInstruction(*this, D, sz, Vn, Vd, N, Q, M, Vm, [this](const auto&, const auto& reg_n, const auto& reg_m) {
+        return ir.FPVectorPairedAddLower(32, reg_n, reg_m, false);
     });
 }
 
diff --git a/tests/A32/fuzz_arm.cpp b/tests/A32/fuzz_arm.cpp
index 6515c2cd..243e7143 100644
--- a/tests/A32/fuzz_arm.cpp
+++ b/tests/A32/fuzz_arm.cpp
@@ -115,8 +115,6 @@ u32 GenRandomInst(u32 pc, bool is_last_inst) {
             "arm_UDF",
             // FPSCR is inaccurate
             "vfp_VMRS",
-            // Unimplemented in Unicorn
-            "asimd_VPADD_float",
             // Incorrect Unicorn implementations
             "asimd_VRECPS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
             "asimd_VRSQRTS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.